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DS1990A-F5+ ,iButton Serial NumberApplicationsa Single Digital Signal at 16.3kbpsAccess Control♦ Button Shape is Self-Aligning with C ..
DS1990A-F5+ ,iButton Serial NumberFeaturesgle data lead and a ground return. Every DS1990A isfactory lasered with a guaranteed unique ..
DS1990R-F3# ,Serial Number iButtonELECTRICAL CHARACTERISTICS(T = -40°C to +85°C.)APARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS IO PI ..
DS1990R-F5# ,Serial Number iButtonApplications♦ Button Shape is Self-Aligning with Cup-ShapedAccess ControlProbesWork-In-Progress Tra ..
DS1991L-F5 ,MultiKey iButtonFEATURES§ Easily affixed with self-stick adhesive§ 1,152-bit secure read/write, nonvolatilebacking, ..
DS1991L-F5 ,MultiKey iButtonFEATURESc 1993§ Unique, factory-lasered and tested 64-bit16.25registration number (8-bit family cod ..

DS1990A-F5+
iButton Serial Number
AVAILABLE
Functional Diagrams
General Description
The DS1990A serial number iButton®is a rugged data
carrier that serves as an electronic registration number
for automatic identification. Data is transferred serially
through the 1-Wire®protocol, which requires only a sin-
gle data lead and a ground return. Every DS1990A is
factory lasered with a guaranteed unique 64-bit regis-
tration number that allows for absolute traceability. The
durable stainless-steel iButton package is highly resis-
tant to environmental hazards such as dirt, moisture,
and shock. Its compact coin-shaped profile is self-
aligning with mating receptacles, allowing the DS1990A
to be used easily by human operators. Accessories
enable the DS1990A iButton to be mounted on almost
any object, including containers, pallets, and bags.
Applications
Access Control
Work-In-Progress Tracking
Tool Management
Inventory Control
FeaturesCan Be Read in Less Than 5msOperating Range: 2.8V to 6.0V, -40°C to +85°C
Common iButton FeaturesUnique Factory-Lasered 64-Bit Registration
Number Ensures Error-Free Device Selection and
Absolute Traceability Because No Two Parts are
AlikeBuilt-In Multidrop Controller for 1-Wire NetDigital Identification by Momentary ContactData Can Be Accessed While Affixed to ObjectEconomically Communicates to Bus Master with
a Single Digital Signal at 16.3kbpsButton Shape is Self-Aligning with Cup-Shaped
ProbesDurable Stainless-Steel Case Engraved with
Registration Number Withstands Harsh
EnvironmentsEasily Affixed with Self-Stick Adhesive Backing,
Latched by its Flange, or Locked with a Ring
Pressed Onto its Rim
Serial Number iButton
Pin Configurations
Ordering Information
PARTTEMP RANGEPIN-PACKAGE
DS1990A-F5+ -40°C to +85°C F5 iButton
DS1990A-F3+ -40°C to +85°C F3 iButton
Examples of Accessories
PARTACCESSORY
DS9096P Self-Stick Adhesive Pad
DS9101 Multipurpose Clip
DS9093RA Mounting Lock Ring
DS9093A Snap-In Fob
DS9092 iButton Probe
16.25mm
5.89mm
0.51mm
3.10mm
0.51mm
17.35mm
BRANDING
F5 SIZE
GNDGNDIO
F3 SIZE01
000000FBC52B
1-Wire®Button®.coYWWZZZDS1990AF5
iButton and 1-Wire are registered trademarks of Maxim
Integrated Products, Inc.
+Denotes a lead(Pb)-free/RoHS-compliant package.
DS1990A
Ordering Information
Serial Number iButton
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(TA= -40°C to +85°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1:All voltages are referenced to ground.
Note 2:External pullup voltage. See Figure 4.
Note 3:System requirement.
Note 4:Full RPUPrange is guaranteed by design and simulation and not production tested. Production testing performed at a
fixed RPUPvalue. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-
Wire recovery times. The specified value here applies to systems with only one device and with the minimum 1-Wire recov-
ery times. For more heavily loaded systems, an active pullup such as that found in the DS2480B may be required.
Note 5:Capacitance on the IO pin could be 800pF when power is first applied. If a 5kΩresistor is used to pull up the IO line to
VPUP, 5µs after power has been applied the parasite capacitance will not affect normal communications.
Note 6:Guaranteed by design, simulation only. Not production tested.
Note 7:Input load is to ground.
IO Voltage Range to GND.....................................-0.5V to +6.0V
IO Sink Current....................................................................20mA
Junction Temperature......................................................+125°C
Storage Temperature Range.............................-55°C to +125°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
IO PIN: GENERAL DATA
1-Wire Pullup Voltage VPUP (Notes 1, 2) 2.8 6.0 V
1-Wire Pullup Resistance RPUP (Notes 3, 4) 0.6 5 k
Input Capacitance CIO (Notes 5, 6) 100 800 pF
Input Load Current IL(Note 7) 0.25 μA
Input Low Voltage VIL(Notes 1, 3, 8) 0.3 V
Input High Voltage VIH(Notes 1, 9) 2.2 V
Output Low Voltage at 4mA VOL (Note 1) 0.4 V
Operating Charge QOP (Notes 6, 10) 30 nC
Recovery Time tREC (Note 3) 1 μs
Time Slot Duration tSLOT (Note 3) 61 μs
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Reset Low Time tRSTL (Notes 3, 11) 480 μs
Reset High Time tRSTH (Notes 3, 12) 480 μs
Presence-Detect High Time tPDH 15 60 μs
Presence-Detect Low Time tPDL (Note 13) 60 240 μs
Presence-Detect Sample Time tMSP (Note 3) 60 75 μs
IO PIN: 1-Wire WRITE
Write-Zero Low Time tW0L (Notes 3, 14) 60 120 μs
Write-One Low Time tW1L (Notes 3, 14) 1 15 μs
IO PIN: 1-Wire READ
Read Low Time tRL (Notes 3, 15) 1 15 - μs
Read Sample Time tMSR (Notes 3, 15) tRL + 15 μs
DS1990A
Serial Number iButton
Note 8:The voltage on IO must be less than or equal to VILMAXwhenever the master drives the line low.
Note 9:VIHis a function of the internal supply voltage.
Note 10:30nC per 72 time slots at 5.0V pullup voltage with a 5kΩpullup resistor and tSLOT≤120µs.
Note 11:The reset low time (tRSTL) should be restricted to a maximum of 960µs to allow interrupt signaling. A longer duration could
mask or conceal interrupt pulses if this device is used in parallel with a DS1994.
Note 12:An additional reset or communication sequence cannot begin until the reset high time has expired.
Note 13:Presence pulse is guaranteed only after a preceding reset pulse (tRSTL).
Note 14:εin Figure 7 represents the time required for the pullup circuitry to pull the voltage on IO up from VILto VIH. The actual
maximum duration for the master to pull the line low is tW1LMAX+ tF- εand tW0LMAX+ tF- ε, respectively.
Note 15:δin Figure 7 represents the time required for the pullup circuitry to pull the voltage on IO up from VILto the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX+ tF.
iButton CAN PHYSICAL SPECIFICATION
SIZE See the Package Information section.
WEIGHT (DS1990A) Ca. 2.5 grams
Detailed Description
The block diagram in Figure 1 shows the major function
blocks of the device. The DS1990A takes the energy it
needs to operate from the IO line, as indicated by the
parasite power block. The ROM function control unit
includes the 1-Wire interface and the logic to implement
the ROM function commands, which access 64 bits of
lasered ROM.
DS1990A
PARASITE POWER
ROM
FUNCTION CONTROLIO64-BIT
LASERED ROM
Figure 1. Block Diagram
DS1990A
64-Bit Lasered ROM
Each DS1990A contains a unique ROM code that is 64
bits long. The first 8 bits are a 1-Wire family code. The
next 48 bits are a unique serial number. The last 8 bits
are a CRC of the first 56 bits. See Figure 2 for details.
The 1-Wire CRC is generated using a polynomial gen-
erator consisting of a shift register and XOR gates as
shown in Figure 3. The polynomial is X8+ X5 + X4+ 1.
Additional information about the 1-Wire Cyclic
Redundancy Check (CRC) is available in Application
Note 27: Understanding and Using Cyclic Redundancy
Checks with Maxim iButton Products.
The shift register bits are initialized to 0. Then starting
with the least significant bit of the family code, one bit
at a time is shifted in. After the 8th bit of the family code
has been entered, the serial number is entered. After
the 48th bit of the serial number has been entered, the
shift register contains the CRC value. Shifting in the 8
bits of CRC returns the shift register to all 0s.
1-Wire Bus System
The 1-Wire bus is a system that has a single bus master
and one or more slaves. In all instances, the DS1990A
is a slave device. The bus master is typically a micro-
controller or PC. For small configurations, the 1-Wire
communication signals can be generated under soft-
ware control using a single port pin. Alternatively, the
DS2480B 1-Wire line driver chip or serial-port adapters
based on this chip (DS9097U series) can be used. This
simplifies the hardware design and frees the micro-
processor from responding in real time. The discussion
of this bus system is broken down into three topics:
hardware configuration, transaction sequence, and
1-Wire signaling (signal types and timing). The 1-Wire
protocol defines bus transactions in terms of the bus
state during specific time slots that are initiated on the
falling edge of sync pulses from the bus master. For a
more detailed protocol description, refer to Chapter 4 of
the Book of iButton Standards.
Serial Number iButton
MSB
8-BIT
CRC CODE48-BIT SERIAL NUMBER
MSBMSBLSB
LSB
LSB
8-BIT FAMILY CODE
(01h)
MSBLSB
Figure 2. 64-Bit Lasered ROM
1ST
STAGE
2ND
STAGE
3RD
STAGE
4TH
STAGE
7TH
STAGE
8TH
STAGE
6TH
STAGE
5TH
STAGE0X1X2X3X4
POLYNOMIAL = X8 + X5 + X4 + 1
INPUT DATA5X6X7X8
Figure 3. 1-Wire CRC Generator
DS1990A
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is
important that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device
attached to the 1-Wire bus must have open-drain or
three-state outputs. The 1-Wire port of the DS1990A is
open drain with an internal circuit equivalent to that
shown in Figure 4. A multidrop bus consists of a 1-Wire
bus with multiple slaves attached. At standard speed,
the 1-Wire bus has a maximum data rate of 16.3kbps.
The value of the pullup resistor primarily depends on
the network size and load conditions. For most applica-
tions, the optimal value of the pullup resistor is approxi-
mately 2.2kΩ. The idle state for the 1-Wire bus is high.
If for any reason a transaction needs to be suspended,
the bus mustbe left in the idle state if the transaction is
to resume. If this does not occur and the bus is left low
for more than 120µs, one or more devices on the bus
may be reset.
Transaction Sequence
The protocol for accessing the DS1990A through the
1-Wire port is as follows:InitializationROM Function Command
Initialization
All transactions on the 1-Wire bus begin with an initial-
ization sequence. The initialization sequence consists
of a reset pulse transmitted by the bus master followed
by presence pulse(s) transmitted by the slave(s). The
presence pulse lets the bus master know that the
DS1990A is on the bus and is ready to operate. For
more details, see the 1-Wire Signalingsection.
Serial Number iButton
RPUP
VPUP
SIMPLE BUS MASTER
DS2480B BUS MASTER
OPEN-DRAIN
PORT PIN
100Ω MOSFET
DATA
DS1990A 1-Wire PORT
Rx = RECEIVE
Tx = TRANSMIT
VDD
POL
RXDSERIAL IN
SERIAL OUTTXD
VPP
GND
N.C.
1-WTO 1-Wire DATA
+5V
HOST CPU
SERIAL
PORT
DS2480B
Figure 4. Hardware Configuration
DS1990A
1-Wire ROM Function Commands
Once the bus master has detected a presence, it can
issue one of the ROM function commands the DS1990A
supports. All ROM function commands are 8 bits long.
A list of these commands follows. (See Figure 5 for a
flowchart.)
Read ROM [33h]
This command allows the bus master to read the
DS1990A’s 8-bit family code, unique 48-bit serial num-
ber, and 8-bit CRC. This command can only be used if
there is a single slave device on the bus. If more than one
slave is present on the bus, a data collision occurs when
all slaves try to transmit at the same time (open drain pro-
duces a wired-AND result). The resultant family code and
48-bit serial number results in a mismatch of the CRC.
Search ROM [F0h]
When a system is initially brought up, the bus master
might not know the number of devices on the 1-Wire
bus or their registration numbers. By taking advantage
of the wired-AND property of the bus, the master can
use a process of elimination to identify the registration
numbers of all slave devices. For each bit of the regis-
tration number, starting with the least significant bit, the
bus master issues a triplet of time slots. On the first slot,
each slave device participating in the search outputs
the true value of its registration number bit. On the sec-
ond slot, each slave device participating in the search
outputs the complemented value of its registration num-
ber bit. On the third slot, the master writes the true
value of the bit to be selected. All slave devices that do
not match the bit written by the master stop participat-
ing in the search. If both of the read bits are zero, the
master knows that slave devices exist with both states
of the bit. By choosing which state to write, the bus
master branches in the ROM code tree. After one com-
plete pass, the bus master knows the registration num-
ber of a single device. Additional passes identify the
registration numbers of the remaining devices. Refer to
Application Note 187: 1-Wire Search Algorithmfor a
detailed discussion, including an example.
Match ROM [55h]/Skip ROM [CCh]
The minimum set of 1-Wire ROM function commands
includes a Match ROM and a Skip ROM command.
Because the DS1990A contains only the 64-bit ROM
without any additional data fields, Match ROM and Skip
ROM are not applicable. The DS1990A remains silent
(inactive) upon receiving a ROM function command
that it does not support. This allows the DS1990A to
coexist on a multidrop bus with other 1-Wire devices
that do respond to Match ROM or Skip ROM.
Serial Number iButton
DS1990A Tx
PRESENCE PULSE
BUS MASTER Tx
RESET PULSE
BUS MASTER Tx ROM
FUNCTION COMMAND
DS1990A Tx
CRC BYTE
DS1990A Tx
FAMILY CODE
(1 BYTE)
DS1990A Tx
SERIAL NUMBER
(6 BYTES)
33h
READ ROM
COMMAND
BIT 0 MATCHN
F0h
SEARCH ROM
COMMAND
DS1990A Tx BIT 0
DS1990A Tx BIT 0
MASTER Tx BIT 0
BIT 1 MATCH
BIT 63 MATCH
DS1990A Tx BIT 1
DS1990A Tx BIT 1
MASTER Tx BIT 1
DS1990A Tx BIT 63
DS1990A Tx BIT 63
MASTER Tx BIT 63
Figure 5. ROM Functions Flowchart
DS1990A

Partno	Mfg	Dc	Qty	Available	Descript
DS1990A-F5+ \|DS1990AF5	MAXIM	N/a	2500	avai	iButton Serial Number
DS1990A-F5+ \|DS1990AF5+	DALLAS	N/a	6000	avai	iButton Serial Number
DS1990A-F5+ \|DS1990AF5	DS	N/a	100	avai	iButton Serial Number