DS1921G-F5 ,2.8 to 5.25 V, thermochron buttonFEATURES Digital identification and information by All dimensions are shown in millimeters. mom ..
DS1921Z ,High Resolution Thermochron iButton Range H: +15°C to +46°C; Z: -5°C to +26°CFEATURES #Denotes a RoHS-compliant device that may include lead(Pb) that is Digital identificatio ..
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DS1921G-F5
2.8 to 5.25 V, thermochron button
DS1921G
Thermochron iButton SPECIAL FEATURES ��Digital thermometer measures temperature in
0.5°C increments
��Accuracy ±1°C from -30°C to +70°C. See EC
table for accuracy specification
��Built-in real-time clock (RTC) and timer has
accuracy of ±2 minutes per month per month
from 0°C to 45°C
��Automatically wakes up and measures tem-perature at user-programmable intervals from
1 to 255 minutes
��Logs up to 2048 consecutive temperature
measurements in protected nonvolatile (NV)
random access memory
��Records a long-term temperature histogram
with 2.0°C resolution
��Programmable temperature-high and
temperature-low alarm trip points
��Records up to 24 time stamps and durations when temperature leaves the range specified
by the trip points
��512 bytes of general-purpose read/write NV
random access memory
��Communicates to host with a single digital signal at 15.4kbits or 125kbits per second
using 1-Wire® protocol
COMMON iButton FEATURES ��Digital identification and information by
momentary contact
��Unique, factory-lasered and tested 64-bit reg-
istration number (8-bit family code + 48-bit
serial number + 8-bit CRC tester) assures ab-
solute traceability because no two parts are
alike
��Multidrop controller for 1-Wire net
��Chip-based data carrier compactly stores
information
��Data can be accessed while affixed to object
��Button shape is self-aligning with cup-shaped
probes
��Durable stainless-steel case engraved with registration number withstands harsh
environments
��Easily affixed with self-stick adhesive
backing, latched by its flange, or locked with
a ring pressed onto its rim
��Presence detector acknowledges when reader
first applies voltage
��Meets UL#913 (4th Edit.). Intrinsically Safe
Apparatus: approved under Entity Concept
for use in Class I, Division 1, Group A, B, C and D Locations (application pending)
F5 MICROCAN GND
5.898921000000FBC52B1-WireAll dimensions are shown in millimeters.
ORDERING INFORMATION DS1921G-F5 -40°C to +85°C F5 iButton
EXAMPLES OF ACCESSORIES DS9096P Self-Stick Adhesive Pad
DS9101 Multi-Purpose Clip
DS9093RA Mounting Lock Ring
DS9093A Snap-In Fob DS9092 iButton Probe
DS1921G
iButton DESCRIPTION The DS1921G Thermochron iButton is a rugged, self-sufficient system that measures temperature and
records the result in a protected memory section. The recording is done at a user-defined rate, both as a
direct storage of temperature values as well as in the form of a histogram. Up to 2048 temperature values
taken at equidistant intervals ranging from 1 to 255 minutes can be stored. The histogram provides 63
data bins with a resolution of 2.0°C. If the temperature leaves a user-programmable range, the DS1921G will also record when this happened, for how long the temperature stayed outside the permitted range,
and if the temperature was too high or too low. An additional 512 bytes of read/write NV memory allow
storing information pertaining to the object to which the DS1921G is associated. Data is transferred
serially via the 1-Wire protocol, which requires only a single data lead and a ground return. Every
DS1921G is factory-lasered with a guaranteed unique electrically readable 64-bit registration number that allows for absolute traceability. The durable stainless steel package is highly resistant to environmental
hazards such as dirt, moisture, and shock. Accessories permit the DS1921G to be mounted on almost any
object, including containers, pallets, and bags.
APPLICATION The DS1921G Thermochron iButton is an ideal device to monitor the temperature of any object it is attached to or shipped with, such as perishable goods or containers of temperature sensitive chemicals.
The read/write NV memory can store an electronic copy of shipping information, date of manufacture
and other important data written as clear as well as encrypted files.
OVERVIEW The block diagram in Figure 1 shows the relationships between the major control and memory sections of
the DS1921G. The device has seven main data components: 1) 64-bit lasered ROM, 2) 256-bit scratch-pad, 3) 4096-bit general-purpose SRAM, 4) 256-bit register page of timekeeping, control, and counter
registers, 5) 96 bytes of alarm time stamp and duration logging memory, 6) 126 bytes of histogram mem-
ory, and 7) 2048 bytes of data-logging memory. Except for the ROM and the scratchpad, all other mem-
ory is arranged in a single linear address space. All memory reserved for logging purposes, counter reg-
isters and several other registers are read-only for the user. The timekeeping and control registers are write-protected while the device is programmed for a mission.
The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide
one of the seven ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Condi-tional Search ROM, 5) Skip ROM, 6) Overdrive-Skip ROM or 7) Overdrive-Match ROM. Upon comple-
tion of an Overdrive ROM command byte executed at standard speed, the device will enter Overdrive
mode, where all subsequent communication occurs at a higher speed. The protocol required for these
ROM function commands is described in Figure 13. After a ROM function command is successfully exe-
cuted, the memory functions become accessible and the master may provide any one of the seven avail-able commands. The protocol for these memory function commands is described in Figure 10. All data is
read and written least significant bit first. DS1921G
Figure 1. DS1921G BLOCK DIAGRAM 3V Lithium
PARASITE POWER The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry “steals” power when-
ever the IO input is high. IO will provide sufficient power as long as the specified timing and voltage re-
quirements are met. The advantages of parasite power are two-fold: 1) by parasiting off this input, lithium is conserved, and 2) if the lithium is exhausted for any reason, the ROM may still be read normally.
64-BIT LASERED ROM Each DS1921G contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. See
Figure 3 for details. The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information
about the Dallas 1-Wire Cyclic Redundancy Check is available in Application Note 27 and in the Book of
DS19xx iButton Standards.
The shift register bits are initialized to 0. Then starting with the least significant bit of the family code, one bit at a time is shifted in. After the eighth bit of the family code has been entered, then the serial
number is entered. After the 48th bit of the serial number has been entered, the shift register contains the
DS1921G
Figure 2. HIERARCHICAL STRUCTURE FOR 1-Wire PROTOCOL
Figure 3. 64-BIT LASERED ROM MSB LSB
MSB LSB MSB LSB MSB LSB
DS1921G
Figure 4. 1-Wire CRC GENERATOR
MEMORY The memory map of the DS1921G is shown in Figure 5. The 4096-bit general-purpose SRAM make up
pages 0 through 15. The timekeeping, control, and counter registers fill page 16, called Register Page (see
Figure 6). Pages 17 to 19 are assigned to storing the alarm time stamps and durations. The temperature
histogram bins begin at page 64 and use up to four pages. The temperature logging memory covers pages
128 to 191. Memory pages 20 to 63, 68 to 127, and 192 to 255 are reserved for future extensions. The scratchpad is an additional page that acts as a buffer when writing to the SRAM memory or the register
page. The memory pages 17 and higher are read-only for the user. They are written to or erased solely
under supervision of the on-chip control logic.
Figure 5. DS1921G MEMORY MAP 0000h to
01FFh Pages 0 to 15
0200h to
021Fh Page 16
0220h to
027Fh Pages 17 to 19
0280h to
07FFh Pages 20 to 63
0800h to
087Fh Pages 64 to 67
0880h to
0FFFh Pages 68 to 127
1000h to
17FFh Pages 128 to 191
1800h to
1FFFh Pages 192 to 255
DS1921G
Figure 6. DS1921G REGISTER PAGE MAP *The first entry in column ACCESS is valid between missions. The second entry shows the applicable access mode while a mission is in progress.
**While a mission is in progress, these addresses can be read. The first attempt to write to these registers
(even read-only ones), however, will end the mission and overwrite selected writeable registers.
TIMEKEEPING The RTC/alarm and calendar information is accessed by reading/writing the appropriate bytes in the register page, address 200h to 206h. Note that some bits are set to 0. These bits will always read 0
regardless of how they are written. The contents of the time, calendar, and alarm registers are in the
DS1921G
RTC and RTC Alarm Register Bitmap
RTC/Calendar The RTC of the DS1921G can run in either 12-hour or 24-hour mode. Bit 6 of the Hours Register
(address 202h) is defined as the 12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic 1 being PM. In the 24-hour mode, bit 5 is the 20-
hour bit (20 to 23 hours).
To distinguish between the days of the week the DS1921G includes a counter with a range from 1 to 7.
The assignment of counter value to the day of week is arbitrary. Typically, the number 1 is assigned to a Sunday (U.S. standard) or to a Monday (European standard).
The calendar logic is designed to automatically compensate for leap years. For every year value that is
either 00 or a multiple of 4 the device will add a 29th of February. This will work correctly up to (but not
including) the year 2100.
The DS1921G is Y2K-compliant. Bit 7 (CENT) of the Months Register at address 205h serves as a
century flag. When the Year Register rolls over from 99 to 00 the century flag will toggle. It is recom-
mended to write the century bit to a 1 when setting the RTC to a time/date between the years 2000 and
2099.
RTC Alarms The DS1921G also contains a RTC alarm function. The alarm registers are located in registers 207h to
20Ah. The most significant bit of each of the alarm registers is a mask bit. When all of the mask bits are
logic 0, an alarm will occur once per week when the values stored in timekeeping registers 200h to 203h
match the values stored in the time of day alarm registers. Any alarm will set the Timer Alarm Flag
(TAF) in the device's Status Register (address 214h). The bus master may set the Search Conditions in the Control Register (address 20Eh) to identify devices with timer alarms by means of the Conditional Search
function (see ROM Function Commands).
DS1921G
RTC Alarm Control
Temperature Conversion The DS1921G measures temperatures with a resolution of 0.5°C. Temperature values are represented in a single byte as an unsigned binary number, which translates into a theoretical range of 128°C. The range,
however, has been limited to values from 0000 0000 (00h) through 1111 1010 (FAh). The codes 01h to
F9h are considered valid temperature readings.
If a temperature conversion yields a temperature that is out-of-range, it will be recorded as 00h (if too low) or FAh (if too high). Since out-of-range results are accumulated in histogram bins 0 and 62 (see
section Temperature Logging and Histogram) the data in these bins is of limited value. For this reason
the specified temperature range of the DS1921G is considered to begin at code 04h and end at code F7h,
which corresponds to histogram bins 1 to 61. With T[7..0] representing the decimal equivalent of a temperature reading, the temperature value is
calculated as
ϑ (°C) = T[7…0] / 2 - 40.0
This equation is valid for converting temperature readings stored in the datalog memory as well as for
data read from the forced temperature conversion readout Register (address 211h).
To specify the high or low temperature alarm thresholds, this equation needs to be resolved to
T[7…0] = 2 * ϑ (°C) + 80.0
A value of 23°C, for example, thus translates into 126 decimal or 7Eh. This corresponds to the binary
patterns 0111 1110, which could be written to a Temperature Alarm Register (address 020Bh and 020Ch, respectively).
Temperature Alarm Register Map DS1921G
Sample Rate The content of the Sample Rate Register (address 020Dh) determines how many minutes the temperature
conversions are apart from each other during a mission. The sample rate may be any value from 1 to 255,
coded as an unsigned 8-bit binary number. If the memory has been cleared (Status Register bit MEMCLR
= 1) and a mission is enabled (Status Register bit EM = 0), writing a non-zero value to the Sample Rate
Register will start a mission. For a full description of the correct sequence of steps to start a temperature-logging mission see sections Missioning or Missioning Example.
Sample Rate Register Map
Control Register The DS1921G is set up for its operation by writing appropriate data to its special function registers that
are located in the register page. Several functions that are controlled by a single bit only are combined
into a single byte called Control Register (address 20Eh). This register can be read and written. If the
device is programmed for a mission, writing to the Control Register will end the mission and change the register contents.
Control Register Bitmap The functional assignments of the individual bits are explained in the table below. Bit 5 has no function.
It always reads 0 and cannot be written to 1.
Control Register Details
DS1921G
Mission Start Delay Counter The content of the Mission Start Delay Counter determines how many minutes the device will wait before
starting the logging process. The mission start delay value is stored as unsigned 16-bit integer number at
addresses 212h (low byte) and 213h (high byte). The maximum delay is 65535 minutes, equivalent to 45 days, 12 hours, and 15 minutes.
For a typical mission, the Mission Start Delay is 0. If a mission is too long for a single DS1921G to store
all temperature readings at the selected sample rate, one can use several devices, staggering the Mission
Start Delay to record the full period. In this case, the RO bit in the control register (address 020Eh) must be set to 0 to prevent overwriting of the recorded temperature log after the datalog memory is full. See
Mission Start and Logging Process description and flow chart for details.
Status Register The Status Register holds device status information and alarm flags. The register is located at address 214h. Writing to this register will not necessarily end a mission.
Status Register Bitmap The functional assignments of the individual bits are explained in the table below. The bits MIP, TLF, THF and TAF can only be written to 0. All other bits are read-only. Bit 3 has no function.
Status Register Details
DS1921G
Mission Time Stamp The Mission Time Stamp indicates the time and date of the first temperature conversion of a mission.
Subsequent temperature conversions will take place as many minutes apart from each other as specified
by the value in the Sample Rate Register. Mission samples occur on minute boundaries.
Mission Time Stamp Register Bitmap
Mission Samples Counter The Mission Samples Counter indicates how many temperature measurements have taken place during the current mission in progress (if MIP = 1) or during the latest mission (if MIP = 0). The value is stored
DS1921G
Mission Samples Counter Register Map
Device Samples Counter The Device Samples Counter indicates how many temperature measurements have taken place since the device was assembled at the factory. The value is stored as an unsigned 24-bit integer number. The
maximum number that can be represented in this format is 16777215, which is higher than the expected
lifetime of the DS1921G iButton. This counter cannot be reset under software control.
Device Samples Counter Register Map
Temperature Logging and Histogram Once setup for a mission, the DS1921G logs the temperature measurements simultaneously byte after
byte in the datalog memory as well as in histogram form in the histogram memory. The datalog memory is able to store 2048 temperature values measured at equidistant time points. The first temperature value
of a mission is written to address location 1000h of the datalog memory, the second value to address
location 1001h and so on. Knowing the starting time point (Mission Time Stamp), the interval between
temperature measurements, the Mission Samples Counter, and the rollover setting, one can reconstruct
the time and date of each measurement stored in the datalog.
There are two alternatives to the way the DS1921G will behave after the 2048 bytes of datalog memory is
filled with data. With rollover disabled (RO = 0), the device will fill the datalog memory with the first
2048 mission samples. Additional mission samples are not logged in the datalog, but the histogram, and
temperature alarm ram continue to update. With rollover enabled (RO = 1), the datalog will wrap around, and overwrite previous data starting at 1000h for the every 2049th mission sample. In this mode the device
stores the last 2048 mission samples.
For the temperature histogram, the DS1921G provides 63 bins that begin at memory address 0800h. Each
bin consists of a 16-bit, non-rolling-over binary counter that is incremented each time a temperature value acquired during a mission falls into the range of the bin. The least significant byte of each bin is stored at
the lower address. Bin 0 begins at memory address 0800h, bin 1 at 0802h, and so on up to 087Ch for bin
62, as shown in Figure 7. The number of the bin to be updated after a temperature conversion is
determined by cutting off the two least significant bits of the binary temperature value. Out of range
values are range locked and counted as 00h or FAh.
DS1921G
Figure 7. Histogram Bin and Temperature Cross-Reference Since each data bin is 2 bytes it can increment up to 65535 times. Additional measurements for a bin that
has already reached its maximum value will not be counted; the bin counter will remain at its maximum
value. With the fastest sample rate of one sample every minute, a 2-byte bin is sufficient for up to 45 days
if all temperature readings fall into the same bin.
Temperature Alarm Logging For some applications it may be essential to not only record temperature over time and the temperature
histogram, but also record when exactly the temperature has exceeded a predefined tolerance band and
for
how long the temperature stayed outside the desirable range. The DS1921G can log high and low durations. The tolerance band is specified by means of the Temperature Alarm Threshold Registers, addresses 20Bh and 20Ch in the register page. One can set a high and a low temperature threshold. See
section Temperature Conversion for the data format the temperature has to be written in. As long as the
temperature values stay within the tolerance band (i.e., are higher than the low threshold and lower than
the high threshold), the DS1921G will not record any temperature alarm. If the temperature during a
mission reaches or exceeds either threshold, the DS1921G will generate an alarm and set either the Temperature High Flag (THF) or the Temperature Low Flag (TLF) in the Status Register (address 214h).
This way, if the search conditions (address 20Eh) are set accordingly, the master can quickly identify
devices with temperature alarms by means of the Conditional Search function (see ROM Function
Commands). The device also generates a time stamp of when the alarm occurred and begins recording the
duration of the alarming temperature.
Time stamps and durations where the temperature leaves the tolerance band are stored in the address
range 0220h to 027Fh, as shown in Figure 8. This allocation allows recording 24 individual alarm events
DS1921G
Figure 8. Alarm Time Stamps and Durations Address Map The alarm time stamp is a copy of the Mission Samples Counter when the alarm first occurred. The least
significant byte is stored at the lower address. One address higher than the time stamp the DS1921G
maintains a 1-byte duration counter that stores the number of samples the temperature was found to be
beyond the threshold. If this counter has reached its limit after 255 consecutive temperature readings and
the temperature has not yet returned to within the tolerance band, the device will issue another time stamp at the next higher alarm location and open another counter to record the duration. If the temperature
returns to normal before the counter has reached its limit, the duration counter of the particular time
stamp will not increment any further. Should the temperature again cross this threshold, it will be
recorded at the next available alarm location. This algorithm is implemented for the low as well as for the
high temperature threshold.
MISSIONING The typical task of the DS1921G is recording the temperature of a temperature-sensitive object. Before
the device can perform this function, it needs to be configured. This procedure is called missioning.
First of all, DS1921G needs to have its RTC set to valid time and date. This reference time may be UTC (also called GMT, Greenwich Mean Time) or any other time standard that was chosen for the application.
The clock must be running (EOSC = 0) for at least one second. Setting a RTC alarm is optional. The
memory assigned to storing alarm time stamps and durations, temperature histogram, as well as the
Mission Time Stamp, Mission Samples Counter, Mission Start Delay and Sample Rate must be cleared
using the Memory Clear command. In case there were temperature alarms in the previous mission, the TLF and THF flags need to be cleared manually. To enable the device for a mission, the EM flag must be
set to 0. These are general settings that have to be made regardless of the type of object to be monitored
and the duration of the mission.
Next, the low temperature and high temperature thresholds to specify the temperature tolerance band must be defined. How to convert a temperature value into the binary code to be written to the threshold
registers is described under Temperature Conversion earlier in this document.
DS1921G
The state of the Search Condition bits in the Control Register does not affect the mission. If multiple
devices are connected to form a 1-Wire net, the setting of the search condition will enable devices to
participate in the conditional search if certain events such as timer or temperature alarm have occurred.
Details on the search conditions are found in the section ROM Function Commands later in this document and in the Control Register description.
The setting of the RO bit (rollover enable) and sample rate depends on the duration of the mission and the
monitoring requirements. If the most recent temperature history is important, the rollover should be
enabled (RO = 1). Otherwise, one should estimate the duration of the mission in minutes and divide the number by 2048 to calculate the value of the sample rate (number of minutes between temperature
conversions). If the estimated duration of a mission is 10 days (= 14400 minutes) for example, then the
2048-byte capacity of the datalog memory would be sufficient to store a new value every 7 minutes. If the
datalog memory of the DS1921G is not large enough to store all temperature readings, one can use
several devices and set the Mission Start Delay to values that make the second device start recording as soon as the memory of the first device is full, and so on. The RO-bit needs to be set to 0 to disable
rollover that would otherwise overwrite the recorded temperature log.
After the RO bit and the Mission Start Delay are set, the Sample Rate Register is the last element of data
that is written. The sample rate may be any value from 1 to 255, coded as an unsigned 8-bit binary number. As soon as the sample rate is written, the DS1921G will set the MIP flag and clear the
MEMCLR flag. After as many minutes as specified by the Mission Start Delay are over, the device will
wait for the next minute boundary, then wake up, copy the current time and date to the Mission Time
Stamp Register, and make the first temperature conversion of the mission. This increments both the
Mission Samples Counter and Device Samples Counter. All subsequent temperature measurements are taken on minute boundaries specified by the value in the Sample Rate Register. One may read the
memory of the DS1921G to watch the mission as it progresses. Care should be taken to avoid memory
access conflicts. See section Memory Access Conflicts for details.
MEMORY/CONTROL FUNCTION COMMANDS The Memory/Control Function Flow Chart (Figure 10) describes the protocols necessary for accessing the memory and the special function registers of the DS1921G. An example on how to use these and
other functions to set up the DS1921G for a mission is included at the end of this document, preceding
the Electrical Characteristics section. The communication between master and DS1921G takes place
either at regular speed (default, OD = 0) or at Overdrive Speed (OD = 1). If not explicitly set into the
Overdrive Mode, the DS1921G assumes regular speed. Internal memory access during a mission has priority over external access through the 1-Wire interface. This can affect the Read Memory commands
described below. See section Memory Access Conflicts for details.
ADDRESS REGISTERS AND TRANSFER STATUS Because of the serial data transfer, the DS1921G employs three address registers, called TA1, TA2, and
E/S (Figure 9). Registers TA1 and TA2 must be loaded with the target address to which the data will be written or from which data will be sent to the master upon a Read command. Register E/S acts like a byte
counter and transfer status register. It is used to verify data integrity with Write commands. Therefore, the
master only has read access to this register. The lower 5 bits of the E/S Register indicate the address of
the last byte that has been written to the scratchpad. This address is called Ending Offset. Bit 5 of the E/S
Register, called PF or “partial byte flag,” is set if the number of data bits sent by the master is not an
DS1921G
incoming data beginning at the byte offset 1Ch and will be full after only 4 bytes. The corresponding
ending offset in this example is 1Fh. For best economy of speed and efficiency, the target address for
writing should point to the beginning of a new page, (i.e., the byte offset will be 0). Thus, the full 32-byte
capacity of the scratchpad is available, resulting also in the ending offset of 1Fh. However, it is possible to write 1 or several contiguous bytes somewhere within a page. The ending offset together with the
Partial and Overflow Flag is mainly a means to support the master checking the data integrity after a
Write command. The highest valued bit of the E/S Register, called AA or Authorization Accepted,
indicates that a valid copy command for the scratchpad has been received and executed. Writing data to
the scratchpad clears this flag.
Figure 9. ADDRESS REGISTERS Bit # 7 6 5 4 3 2 1 0
Target Address (TA1)
Target Address (TA2)
Ending Address with
Data Status (E/S) (Read Only)
WRITING WITH VERIFICATION To write data to the DS1921G, the scratchpad has to be used as intermediate storage. First the master
issues the Write Scratchpad command to specify the desired target address, followed by the data to be written to the scratchpad. In the next step, the master sends the Read Scratchpad command to read the
scratchpad and to verify data integrity. As preamble to the scratchpad data, the DS1921G sends the
requested target address TA1 and TA2 and the contents of the E/S Register. If the PF flag is set, data did
not arrive correctly in the scratchpad. The master does not need to continue reading; it can start a new
trial to write data to the scratchpad. Similarly, a set AA flag indicates that the Write command was not recognized by the device. If everything went correctly, both flags are cleared and the ending offset
indicates the address of the last byte written to the scratchpad. Now the master can continue verifying
every data bit. After the master has verified the data, it has to send the Copy Scratchpad command. This
command must be followed exactly by the data of the three address registers TA1, TA2 and E/S as the
master has read them verifying the scratchpad. As soon as the DS1921G has received these bytes, it will copy the data to the requested location beginning at the target address.
Write Scratchpad Command [0Fh] After issuing the Write Scratchpad command, the master must first provide the 2-byte target address,
followed by the data to be written to the scratchpad. The data will be written to the scratchpad starting at
the byte offset (T4:T0). The ending offset (E4:E0) will be the byte offset at which the master stops writ-ing data. Only full data bytes are accepted. If the last data byte is incomplete, its content will be ignored
and the partial byte flag (PF) will be set.
When executing the Write Scratchpad command, the CRC generator inside the DS1921G (see Figure 16)
DS1921G
generator and then shifting in the command code (0Fh) of the Write Scratchpad command, the Target
Addresses TA1 and TA2 as supplied by the master and all the data bytes. The master may end the Write
Scratchpad command at any time. However, if the ending offset is 11111b, the master may send 16 read
time slots and will receive an inverted CRC16 generated by the DS1921G.
The range 200h to 213h of the register page is protected during a mission. See Figure 6, Register
Page Map, for the access type of the individual registers between and during missions.
Read Scratchpad Command [AAh] This command is used to verify scratchpad data and target address. After issuing the Read Scratchpad command, the master begins reading. The first 2 bytes will be the target address. The next byte will be the
ending offset/data status byte (E/S) followed by the scratchpad data beginning at the byte offset (T4:T0),
as shown in Figure 9. Regardless of the actual ending offset, the master may read data until the end of the
scratchpad after which it will receive an inverted CRC16 of the command code, Target Addresses TA1
and TA2, the E/S byte, and the scratchpad data starting at the target address. After the CRC is read, the bus master will read logical 1s from the DS1921G until a reset pulse is issued.
Copy Scratchpad [55h] This command is used to copy data from the scratchpad to the writable memory sections. Applying Copy
Scratchpad to the Sample Rate Register can start a mission provided that several preconditions are met.
See Mission Start and Logging Process description and the flow chart in Figure 11 for details. After issuing the Copy Scratchpad command, the master must provide a 3-byte authorization pattern, which can
be obtained by reading the scratchpad for verification. This pattern must exactly match the data contained
in the three address registers (TA1, TA2, E/S, in that order). If the pattern matches, the AA
(Authorization Accepted) flag will be set and the copy will begin. A pattern of alternating 1s and 0s will
be transmitted after the data has been copied until the master issues a reset pulse. While the copy is in progress any attempt to reset the part will be ignored. Copy typically takes 2µs per byte.
The data to be copied is determined by the three address registers. The scratchpad data from the begin-
ning offset through the ending offset will be copied, starting at the target address. Anywhere from 1 to 32
bytes may be copied to memory with this command. The AA flag will remain at logic 1 until it is cleared by the next Write Scratchpad command. Note that Copy Scratchpad when applied to the address range
200h to 213h during a mission will end the mission.
Read Memory [F0h] The Read Memory command may be used to read the entire memory. After issuing the command, the
master must provide the 2-byte target address. After the 2 bytes, the master reads data beginning from the target address and may continue until the end of memory, at which point logic 0s will be read. It is im-
portant to realize that the target address registers will contain the address provided. The ending offset/data
status byte is unaffected.
The hardware of the DS1921G provides a means to accomplish error-free writing to the memory section. To safeguard data in the 1-Wire environment when reading and to simultaneously speed up data transfers,
it is recommended to packetize data into data packets of the size of one memory page each. Such a packet
would typically store a 16-bit CRC with each page of data to ensure rapid, error-free data transfers that
eliminate having to read a page multiple times to verify whether if the received data is correct. (See
DS1921G
Figure 10-1. MEMORY/CONTROL FUNCTION FLOW CHART nd Part
From Figure 10nd Part
DS1921G
Figure 10-2. MEMORY/CONTROL FUNCTION FLOW CHART rd Part
From Figure 10st Part
To Figure 10st Part
From Figure 10rd Part
DS1921G
Figure 10-3. MEMORY/CONTROL FUNCTION FLOW CHART From Figure 10nd Part
To Figure 10nd Part
To Figure 10th Part
From Figure 10th Part
DS1921G
Figure 10-4. MEMORY/CONTROL FUNCTION FLOW CHART From Figure 10rd Part
To Figure 10rd Part
DS1921G
Read Memory with CRC [A5h] The Read Memory with CRC command is used to read memory data that cannot be packetized, such as
the register page and the data recorded by the device during a mission. The command works essentially
the same way as the simple Read Memory, except for the 16-bit CRC that the DS1921G generates and
transmits following the last data byte of a memory page. After having sent the command code of the Read Memory with CRC command, the bus master sends a 2-
byte address (TA1 = T7:T0, TA2 = T15:T8) that indicates a starting byte location. With the subsequent
read data time slots the master receives data from the DS1921G starting at the initial address and
continuing until the end of a 32-byte page is reached. At that point the bus master will send 16 additional
read data time slots and receive an inverted 16-bit CRC. With subsequent read data time slots the master will receive data starting at the beginning of the next page followed again by the inverted CRC for that
page. This sequence will continue until the bus master resets the device.
With the initial pass through the Read Memory with CRC flow, the 16-bit CRC value is the result of
shifting the command byte into the cleared CRC generator followed by the 2 address bytes and the contents of the data memory. Subsequent passes through the Read Memory with CRC flow will generate
a 16-bit CRC that is the result of clearing the CRC generator and then shifting in the contents of the data
memory page. After the 16-bit CRC of the last page is read, the bus master will receive logical 0s from
the DS1921G and inverted CRC16s at page boundaries until a reset pulse is issued. The Read Memory
with CRC command sequence can be ended at any point by issuing a reset pulse.
Clear Memory [3Ch] The Clear Memory command is used to clear the Sample Rate, Mission Start Delay, Mission Time
Stamp, and Mission Samples Counter in the register page and the Temperature Alarm Memory and the
Temperature Histogram Memory. These memory areas must be cleared for the device to be set up for
another mission. The Clear Memory command does not clear the datalog memory or the temperature and timer alarm flags in the Status Register. The RTC oscillator must be on and have counted at least 1
second, before issuing the command. For the Clear Memory command to function the EMCLR bit in
Control Register must be set to 1, and the Clear Memory command must be issued with the very next
access to the device’s memory functions. Issuing any other memory function command will reset the
EMCLR bit. The Clear Memory process takes 500µs. When the command is completed the MEMCLR bit in the Status Register will read 1 and the EMCLR bit will be 0.
Convert Temperature [44h] If a mission is not in progress (MIP = 0) the Convert Temperature command can be issued to measure the
current temperature of the device. The result of the temperature conversion will be found at memory
address 211h in the register page. This command takes maximum 90ms to complete. During this time the device remains fully accessible for memory/control and ROM function commands.
