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DS1859MAXIMN/a1198avaiDual, Temperature-Controlled Resistors with Internally Calibrated Monitors
DS1859+ |DS1859MAXIMN/a1392avaiDual, Temperature-Controlled Resistors with Internally Calibrated Monitors


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DS1859-DS1859+
Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
General Description
The DS1859 dual, temperature-controlled, nonvolatile
(NV) variable resistors with three monitors consists of
two 50kΩor two 20kΩ, 256-position, linear, variable
resistors; three analog monitor inputs (MON1, MON2,
MON3); and a direct-to-digital temperature sensor. The
device provides an ideal method for setting and tem-
perature-compensating bias voltages and currents in
control applications using minimal circuitry. The vari-
able resistor settings are stored in EEPROM memory
and can be accessed over the 2-wire serial bus.
Applications
Optical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
FeaturesSFF-8472 CompatibleFive Monitored Channels (Temperature, VCC,
MON1, MON2, MON3)Three External Analog Inputs (MON1, MON2, MON3)
That Support Internal and External CalibrationScalable Dynamic Range for External Analog InputsInternal Direct-to-Digital Temperature SensorAlarm and Warning Flags for All Monitored
ChannelsTwo 50kΩor Two 20kΩ, Linear, 256-Position,
Nonvolatile Temperature-Controlled Variable
ResistorsResistor Settings Changeable Every 2°CAccess to Monitoring and ID Information
Configurable with Separate Device Addresses2-Wire Serial InterfaceTwo Buffers with TTL/CMOS-Compatible Inputs and
Open-Drain OutputsOperates from a 3.3V or 5V SupplyOperating Temperature Range of -40°C to +95°C
Ordering Information
Rev 4; 2/06
EVALUATION KIT
AVAILABLE
PARTRESISTANCEPIN-PACKAGE
DS1859B-02020kΩ16 CSBGA
DS1859B-020+20kΩ16 CSBGA
DS1859B-05050kΩ16 CSBGA
DS1859B-050+50kΩ16 CSBGA
TOP VIEW
CSBGA (4mm x 4mm)
1.0mm PITCH
TSSOP24
MON3OUT1IN2
MON1L0GND
WPENH0SDAOUT2VCCSCLIN1
MON2
DS1859
SDA1
SCL
OUT1
IN1
OUT2
IN2
WPEN
GND
VCC
MON3
MON2
MON1
Pin Configurations
DS1859
SDA10.1μF
SCL
OUT1
IN1
OUT2
IN2
WPEN
GND
VCC
MON3
MON2
MON1
GROUND TO
DISABLE WRITE
PROTECT
Rx POWER*
DIAGNOSTIC
INPUTS
TO LASER
MODULATION
CONTROL
TO LASER BIAS
CONTROL
DECOUPLING
CAP
Tx POWER*
Tx BIAS*
*SATISFIES SFF-8472 COMPATIBILITY
VCC
VCC = 3.3V
4.7kΩ4.7kΩ
Tx-FAULT
LOS
2-WIRE
INTERFACE
Typical Operating Circuit
+Denotes lead-free package.
Ordering Information continued at end of data sheet.
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVCC(Note 1)2.855.5V
Input Logic 1 (SDA, SCL, WPEN)VIH(Note 2)0.7 x VccVCC + 0.3V
Input Logic 0 (SDA, SCL, WPEN)VIL(Note 2)-0.3+0.3 x VCCV
Resistor Inputs (L0, L1, H0, H1)-0.3VCC + 0.3V
Resistor CurrentIRES-3+3mA
High-Z Resistor CurrentIROFF0.0010.1µA
Input logic 11.5Input Logic Levels (IN1, IN2)Input logic 00.9V
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCCRelative to Ground...........-0.5V to +6.0V
Voltage Range on Inputs Relative
to Ground*................................................-0.5V to VCC+ 0.5V
Voltage Range on Resistor Inputs Relative
to Ground*................................................-0.5V to VCC+ 0.5V
Current into Resistors............................................................5mA
Operating Temperature Range...........................-40°C to +95°C
Programming Temperature Range.........................0°C to +70°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature.......................................See IPC/JEDEC
J-STD-020A
RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +95°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply CurrentICC(Note 3)12mA
Input LeakageIIL-200+200nA
VOL13mA sink current00.4Low-Level Output Voltage
(SDA, OUT1, OUT2)VOL26mA sink current00.6V
Full-Scale Input (MON1, MON2,
MON3)
At factory setting
(Note 4)2.48752.52.5125V
Full-Scale VCC MonitorAt factory setting
(Note 5)6.52086.55366.5864V
I/O CapacitanceCI/O10pF
WPEN PullupRWPEN4065100kΩ
Digital Power-On ResetPOD1.02.2V
Analog Power-On ResetPOA2.02.6V
DC ELECTRICAL CHARACTERISTICS
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
*Not to exceed 6.0V.
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Thermometer ErrorTERR-40°C to +95°C±3.0°C
DIGITAL THERMOMETER
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
EEPROM Writes+70°C50,000
NONVOLATILEMEMORYCHARACTERISTICS
(VCC= 2.85V to 5.5V)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input Resolution∆VMON610µV
Supply Resolution∆VCC1.6mV
Input/Supply Accuracy
(MON1, MON2, MON3, VCC)ACCAt factory setting0.250.5% FS
(full scale)
Update Rate for MON1, MON2,
MON3, Temp, or VCCtframe3045ms
Input/Supply Offset
(MON1, MON2, MON3, VCC)VOS(Note 14)05LSB
ANALOG VOLTAGE MONITORING
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Position 00h Resistance (50kΩ)TA = +25°C0.651.01.35kΩ
Position FFh Resistance (50kΩ)TA = +25°C405060kΩ
Position 00h Resistance (20kΩ)TA = +25°C0.200.400.55kΩ
Position FFh Resistance (20kΩ)TA = +25°C162024kΩ
Absolute Linearity(Note 6)-2+2LSB
Relative Linearity(Note 7)-1+1LSB
Temperature Coefficient(Note 8)50ppm/°C
ANALOGRESISTOR CHARACTERISTICS
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Fast mode (Note 9)0400SCL Clock FrequencyfSCLStandard mode (Note 9)0100kHz
Fast mode (Note 9)1.3Bus Free Time Between STOP and
START ConditiontBUFStandard mode (Note 9)4.7µs
Fast mode (Notes 9, 10)0.6Hold Time (Repeated)
START ConditiontHD:STAStandard mode (Notes 9, 10)4.0µs
Fast mode (Note 9)1.3LOW Period of SCL ClocktLOWStandard mode (Note 9)4.7µs
Fast mode (Note 9)0.6HIGH Period of SCL ClocktHIGHStandard mode (Note 9)4.0µs
Fast mode (Notes 9, 11, 12)00.9Data Hold TimetHD:DATStandard mode (Notes 9, 11, 12)0µs
Fast mode (Note 9)100Data Setup TimetSU:DATStandard mode (Note 9)250ns
Fast mode (Note 9)0.6START Setup TimetSU:STAStandard mode (Note 9)4.7µs
Fast mode (Note 13)20 + 0.1CB300Rise Time of Both SDA and SCL
SignalstRStandard mode (Note 13)20 + 0.1CB1000ns
Fast mode (Note 13)20 + 0.1CB300Fall Time of Both SDA and SCL
SignalstFStandard mode (Note 13)20 + 0.1CB300ns
Fast mode0.6Setup Time for STOP ConditiontSU:STOStandard mode4.0µs
Capacitive Load for Each Bus LineCB(Note 13)400pF
EEPROM Write TimetW(Note 14)1020msELECTRICAL CHARACTERISTICS
(VCC= 2.85V to 5.5V, TA= -40°C to +95°C, unless otherwise noted. See Figure 6.)
Note 1:All voltages are referenced to ground.
Note 2: I/O pins of fast-mode devices must not obstruct the SDA and SCL lines if VCCis switched off.
Note 3:SDA and SCL are connected to VCCand all other input signals are connected to well-defined logic levels.
Note 4: Full Scale is user programmable.The maximum voltage that the MON inputs read is approximately Full Scale, even if the volt-
age on the inputs is greater than Full Scale.
Note 5:This voltage defines the maximum range of the analog-to-digital converter voltage, not the maximum VCC voltage.
Note 6: Absolute linearity is the difference of measured value from expected value at DAC position. The expected value is a
straight line from measured minimum position to measured maximum position.
Note 7: Relative linearity is the deviation of an LSB DAC setting change vs. the expected LSB change. The expected LSB change
is the slope of the straight line from measured minimum position to measured maximum position.
Note 8: See the Typical Operating Characteristics.
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT> 250ns must then be met. This
is automatically the case if the device does not stretch the LOWperiod of the SCL signal. If such a device does stretch the
LOWperiod of the SCL signal, it must output the next data bit to the SDA line tRMAX+ tSU:DAT= 1000ns + 250ns = 1250ns
before the SCL line is released.
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum tHD:DATonly has to be met if the device does not stretch the LOWperiod (tLOW) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 13: CB—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.
Note 14: Guaranteed by design.
Typical Operating Characteristics
(VCC= 5.0V, TA= +25°C, for both 50kΩand 20kΩversions, unless otherwise noted.)
TEMPERATURE (°C)6080200-20
SUPPLY CURRENT vs. TEMPERATURE
DS1859 toc01
SUPPLY CURRENT (
SDA = SCL = VCC
SUPPLY CURRENT vs. VOLTAGE
DS1859 toc02
VOLTAGE (V)
SUPPLY CURRENT (
SDA = SCL = VCC
RESISTANCE vs. SETTING
DS1859 toc03
SETTING (DEC)
RESISTANCE (k
50kΩ VERSION
RESISTANCE vs. SETTING
DS1859 toc04
SETTING (DEC)
RESISTANCE (k
20kΩ VERSION
ACTIVE SUPPLY CURRENT
vs. SCL FREQUENCY
DS1859 toc05
SCL FREQUENCY (kHz)
ACTIVE SUPPLY CURRENT (
SDA = VCC
RESISTOR 0 INL (LSB)
DS1859 toc06
SETTING (DEC)
RESISTOR 0 INL (LSB)
-1.0250
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