DS1858B-050 ,Dual Temperature-Controlled Resistors with Three MonitorsApplicationsOptical Transceivers♦ Two Buffers with TTL/CMOS-Compatible InputsOptical Transponders a ..
DS1858B-050+ ,Dual Temperature-Controlled Resistors with Three MonitorsApplications♦ 2-Wire Serial InterfaceOptical Transceivers♦ Two Buffers with TTL/CMOS-Compatible Inp ..
DS1858E-050 ,Dual Temperature-Controlled Resistors with Three MonitorsFeaturesThe DS1858 dual temperature-controlled nonvolatile♦ Five Total Monitored Channels (Temperat ..
DS1859 ,Dual, Temperature-Controlled Resistors with Internally Calibrated MonitorsFeaturesThe DS1859 dual, temperature-controlled, nonvolatile ♦ SFF-8472 Compatible(NV) variable res ..
DS1859+ ,Dual, Temperature-Controlled Resistors with Internally Calibrated Monitorsapplications using minimal circuitry. The vari-♦ Alarm and Warning Flags for All Monitoredable resi ..
DS1859B-050 ,Dual, Temperature-Controlled Resistors with Internally Calibrated MonitorsFeaturesThe DS1859 dual, temperature-controlled, nonvolatile♦ SFF-8472 Compatible(NV) variable resi ..
DZD9.1 ,0.2W Zener DiodesElectrical Characteristics at Ta = 25˚CZener voltage VZ will be subdivided into X, Y, Z at your req ..
DS1858B-050-DS1858E-050
Dual Temperature-Controlled Resistors with Three Monitors
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
General DescriptionThe DS1858 dual temperature-controlled nonvolatile
(NV) variable resistors with three monitors consists of
two 50kΩ256-position linear variable resistors, three
analog monitor inputs (MON1, MON2, MON3), and a
direct-to-digital temperature sensor. The device pro-
vides an ideal method for setting and temperature-com-
pensating bias voltages and currents in control
applications using minimal circuitry. The variable resis-
tor settings are stored in EEPROM memory and can be
accessed over the 2-wire serial bus.
ApplicationsOptical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
FeaturesFive Total Monitored Channels (Temperature,
VCC, MON1, MON2, MON3)Three External Analog Inputs (MON1, MON2,
MON3)Internal Direct-to-Digital Temperature SensorTwo 50kΩ, Linear, 256-Position, Nonvolatile
Temperature-Controlled Variable ResistorsResistor Settings Changeable Every 2°CAccess to Monitoring and ID Information
Configurable with Separate Device Addresses2-Wire Serial InterfaceTwo Buffers with TTL/CMOS-Compatible Inputs
and Open-Drain OutputsOperates from a 3.3V or 5V SupplySFF-8472 Compatible
Ordering InformationRev 0; 1/03
Pin Configurations
Typical Operating Circuit
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage on VCCRelative to Ground.......................-0.5V to +6.0V
Voltage on Inputs Relative
to Ground*................................................-0.5V to VCC+ 0.5V
Voltage on Resistor Inputs Relative
to Ground*................................................-0.5V to VCC+ 0.5V
Current into Resistors............................................................5mA
Operating Temperature Range...........................-40°C to +95°C
Programming Temperature Range.........................0°C to +70°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature.......................................See IPC/JEDEC
RECOMMENDED DC OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS*Not to exceed 6.0V.
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
DIGITAL THERMOMETER
ANALOG VOLTAGE MONITORING (VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
ANALOGRESISTOR CHARACTERISTICS(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
DS1858
Dual Temperature-Controlled Resistors with
Three MonitorsELECTRICAL CHARACTERISTICS
Note 1:All voltages are referenced to ground.
Note 2: I/O pins of fast-mode devices must not obstruct the SDA and SCL lines if VCCis switched off.
Note 3:SDA and SCL are connected to VCCand all other input signals are connected to well-defined logic levels.
Note 4: The maximum voltage the MON inputs will read is approximately 2.5V, even if the voltage on the inputs is greater than 2.5V.
Note 5:This voltage is defining the maximum range of the analog-to-digital converter voltage and not the maximum VCC voltage.
Note 6: Absolute linearity is the difference of measured value from expected value at DAC position. The expected value is a
straight line from measured minimum position to measured maximum position.
Note 7: Relative linearity is the deviation of an LSB DAC setting change vs. the expected LSB change. The expected LSB change
is the slope of the straight line from measured minimum position to measured maximum position.
Note 8: See the Typical Operating Characteristics.
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT> 250ns must then be met. This
is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the
LOW period of the SCL signal, it must output the next data bit to the SDA line tRMAX+ tSU:DAT= 1000ns + 250ns = 1250ns
before the SCL line is released.
DS1858
Dual Temperature-Controlled Resistors with
Three MonitorsELECTRICAL CHARACTERISTICS (continued)(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum tHD:DATonly has to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) in order
to bridge the undefined region of the falling edge of SCL.
Note 13: CB—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.
Note 14: EEPROM write begins after a STOPcondition occurs.
Typical Operating Characteristics(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
Typical Operating Characteristics (continued)(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
Dual Temperature-Controlled Resistors with
Three Monitors
Detailed DescriptionThe user can read the registers that monitor the VCC,
MON1, MON2, MON3, and temperature analog signals.
After each signal conversion, a corresponding bit is set
that can be monitored to verify that a conversion has
occurred. The signals also have alarm flags that notify
the user when the signals go above or below the user-
defined value. Interrupts can also be set for each signal.
The position values of each resistor can be indepen-
dently programmed. The user can assign a unique
value to each resistor for every 2°C increment over the
-40°C to +102°C range.
Two buffers are provided to convert logic-level inputs
into open-drain outputs. Typically these buffers are
used to implement transmit (Tx) fault and loss-of-signal
(LOS) functionality. Additionally, OUT1 can be asserted
in the event that one or more of the monitored values
go beyond user-defined limits.
DS1858
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
Monitored SignalsEach signal (VCC, MON1, MON2, MON3, and tempera-
ture) is available as a 16-bit value with 12-bit accuracy
(left-justified) over the serial bus. See Table1 for signal
scales and Table2 for signal format. The four LSBs
should be masked when calculating the value.
The signals are updated every frame rate (tframe) in a
round-robin fashion.
The comparison of all five signals with the high and low
user-defined values are done automatically. The corre-
sponding flags are set to 1 within a specified time of
the occurrence of an out-of-limit condition.
Calculating Signal ValuesThe LSB = 100µV for VCC, and the LSB = 38.147µV for
the MON signals.
To calculate the value of VCC, convert the unsigned 16-
bit value to decimal and multiply by 100µV.
To calculate the value of MON1, MON2, or MON3 con-
vert the unsigned 16-bit value to decimal and multiply
by 38.147µV.
To calculate the value of the temperature, treat the
two’s complement value binary number as an unsigned
binary number, then convert to decimal and divide by
256. If the result is greater than or equal to 128, then
subtract 256 from the result.
Temperature: high byte: -128°C to +127°C signed; low
byte: 1/256°C.
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
Variable ResistorsThe value of each variable resistor is determined by
a temperature-addressed look-up table, which can
assign a unique value (00h to FFh) to each resistor for
every 2°C increment over the -40°C to +102°C range
(see Table3). See the Temperature Conversion section
for more information.
The variable resistors can also be used in manual
mode. If the TEN bit equals 0, then the resistors are in
manual mode and the temperature indexing is dis-
abled. The user sets the resistors in manual mode by
writing to addresses 82h and 83h in Table 01 to control
resistors 0 and 1, respectively.
Memory DescriptionMain and auxiliary memories can be accessed by two
separate device addresses. The Main Device address
is A2h (or value in Table 01 byte 8Ch, when ADFIX = 1)
and the Auxiliary Device address is A0h. A user option
is provided to respond to one or two device addresses.
This feature can be used to save component count in
SFF applications (Main Device address can be used)
or other applications where both GBIC (Auxiliary
Device address can be used) and monitoring functions
are implemented and two device addresses are need-
ed. The memory blocks are enabled with the corre-
sponding device address. Memory space from 80h and
up is accessible only through the Main Device address.
This memory is organized as three tables; the desired
tablecan be selected by the contents of memory loca-
tion 7Fh, Main Device. The Auxiliary Device address
has no access to the tables, but the Auxiliary Device
address can be mapped into the Main Device’s memo-
ry space as a fourth table. Device addresses are pro-
grammable with two control bits in EEPROM.
ADEN configures memory access to respond to differ-
ent device addresses (see Tables4 and 5).
The default device address for EEPROM-generated
addresses is A2h.
If the ADEN bit is 1, additional 128 bytes of EEPROM
are accessible through the Main Device, selected as
Table00 (see Figure3). In this configuration, the
Auxiliary Device is not accessible. APEN controls the
protection of Table 00 regardless of the setting of
ADEN.
ADFIX (address fixed) determines whether the Main
Device address is determined by an EEPROM byte
(Table01, byte 8Ch, when ADFIX =1). There can be up
to 128 devices sharing a common 2-wire bus, with
each device having its own unique device address.
Memory ProtectionMemory access from either device address can be
either read/write or read only. Write protection
is accomplished by a combination of control bits in
EEPROM (APEN and MPEN in configuration register
89h) and a write-protect enable (WPEN) pin. Since the
WPEN pin is often not accessible from outside the mod-
ule, this scheme effectively allows the module to be
locked by the manufacturer to prevent accidental writes
by the end user.
Separate write protection is provided for the Auxiliary
and Main Device address through distinct bits APEN
and MPEN. APEN and MPEN are bits from configura-
tion register 89h, Table01. Due to the location, the
APEN and MPEN bits can only be written through the
Main Device address. The control of write privileges
through the Auxiliary Device address is dependent on
the value of APEN. Care should be taken with the set-
ting of MPEN, once set to a 1, assuming WPEN is high,
access through the Main Device is thereafter denied
unless WPEN is taken to a low level. By this means
inadvertent end-user write access can be denied.
Main Device address space 60h to 7Fh is SRAM and is
not write protected by APEN, MPEN, or WPEN. For
example, the user may reset flags set by the device.
Bytes designated as “Reserved” may be used as
scratchpad, but they will not be stored in a power cycle
because of their volatility. These bytes are reserved for
added functionality in future versions of this device.
Note that in single device mode (ADEN bit = 1), APEN
determines the protection level of Table00, indepen-
dent of WPEN.
The write-protect operation, for both Main and Auxiliary
Devices, is summarized in Tables 6 and 7.
