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DS1682S
Total Elapsed Time Recorder with Alarm
FEATURESRecords the total time that the Event Input has
been active and the number of events that
have occurredElapsed Time Counter to monitor eventdurations with quarter second resolutionBuilt in 32 bit non-volatile Total Time
Accumulator Register (34 years)Non-volatile 17-bit Event Counter records the
total number of times an event has occurredProgrammable 32 bit non-volatile alarm trip
point to trigger Alarm# outputAlarm# output to alert the user that the total
accumulated time limit has been reachedCalibrated, Temperature Compensated RCtime base (accurate to 1% typ)Stores the contents of the Elapsed Time
Counter with the previous total and
increments the event counter at the end of
each event or power downReset Enable bit to allow the device to be
cleared to zero, if desired10 bytes of write protectable EEPROM user
memoryWrite Disable bit to prevent the memory frombeing changed or erasedAnti-Glitch filter will prevent noise spikes
from triggering false events on the Event
Input2-wire serial communicationWide power supply range (2.5V – 5.5V)
PIN ASSIGNMENT
PIN DESCRIPTIONEVENT- Event InputALARM- Alarm Output
GND- Ground
SDA- 2-wire Data Input/Output
SCL- 2-wire Clock Input
VCC- Voltage SupplyN/C- No Connect
ORDERING INFORMATIONDS1682 8-Pin μSOP
DS1682S 8-Pin SOIC (150 mil)DS1682X 6-Pin Flip Chip PackageFor more information of Flip Chip Packaging,go to www.dalsemi.com to the Released Data
Sheets section and select Chip Scale and Flip
Chip Package Data Index.
DESCRIPTIONThe DS1682 is an integrated elapsed time recorder that will provide the total amount of time that an event
is/has been active since the DS1682 was last reset to zero via the 2-wire bus. When the total time
accumulated is equal to the preset alarm trip point and the polarity bit is set to a zero, the Alarm# output
will become active to alert the user, or with the polarity bit set to a one, the Alarm# output will become
inactive when the values match. This is ideal for applications such as monitoring the total amount of time
DS1682
Total Elapsed Time Recorder with AlarmSDA
SCL
EVENT
GND
VccALARM
Bottom ViewDS1682X 6-pin Flip Chip
SDA
SCL
EVENT
GND
Vcc
ALARM
Top ViewDS1682S 8-Pin SOIC (150 mil)
DS1682
The DS1682 uses a calibrated, temperature compensated RC time base to increment an elapsed time
counter while an event is active. When the event becomes active, the contents of the non-volatile Total
Time Accumulator register are downloaded to the Elapsed Time Counter (ETC) and as the event
continues, the ETC is incremented in quarter second increments. When the event becomes inactive or thepower is removed, the DS1682 will increment the 17-bit non-volatile Event Counter register and put the
contents of the ETC into the 32-bit non-volatile Total Accumulated Time register which can hold up to
34 years of active event time. A storage cap may be required on VCC to provide enough power to store
the value in the ETC to the Total Time Accumulator register if power is taken away at the same time the
event ends.
When the 32-bit non-volatile Alarm Trip Point register is programmed to a non-zero number via the
2-wire bus and the AoR bit in the Configuration register set to a zero, the Alarm# output will be enabled
and the DS1682 will begin to monitor the values in the ETC for the programmed value in the Alarm Trip
Point register. Once the number in the ETC is equal to or greater than the value in the Alarm Trip Pointregister, and the polarity bit is set to a zero, the Alarm# output will become active to alert the user, or
with the polarity bit set to a one, the Alarm# output will become inactive when the values match. The
DS1682 will activate the Alarm# output by pulling the pin low four times at power up, when the alarm
becomes active, or when the Alarm# pin is pulled low and released if the AOS bit is set to a 1. If the
AOS bit is a 0, the Alarm# output will be constantly low when the alarm is active.
In order to reset the device, the Reset Enable bit or the AoR bit in the Configuration register must be set
to a 1. With the Reset Enable bit set to a 1 or the AoR bit set to a 1 with the Alarm# pin held high, the
DS1682 can be reset by the Reset command sent over the 2-wire bus. If the Write Disable flag in the
Configuration register is set to a 1 by writing the Write Disable command two times, the Configurationregisters and Alarm Trip Point register will not be able to be written. If the Write Disable flag is set to a
1, the Total Time Accumulator, Elapsed Time Counter, and Event Counter will be able to be reset, if the
Reset Enable or AoR bits have been set to a 1, but the status of the Reset Enable or AoR bits will not be
able to be changed since the Configuration register is locked by the WDF being set to a 1.
The Write Memory Disable is similar to the Write Disable and is used to control the writability of the
10 bytes of EEPROM User memory. The Write Memory Disable Flag is also set to a 1 when the Write
Memory Disable command is written twice and can not be changed once it is set to a 1. If the Write
Memory Disable bit is set to a 1, the 10 bytes of memory will not be able to be written or erased. If the
Write Memory Disable bit is a 0, the user will have full access to the bytes with the standard EEPROMwrite time restrictions. If the Write Disable is a 0, the device is fully writable or erasable except for the
User Memory and the Write Memory Disable flag, which are only controlled by the Write Memory
Disable command. With both the Write Disable and Write Memory Disable set to 1’s, the only inputs
that will be accessible are the Reset command if it is enabled, the Event input and the Alarm#
input/output. The rest of the part will be read only.
When data is written to the device, the device slave address will be sent first followed by the address
pointer and the desired byte of data. Once a single byte of data is sent, there must be at least 200 mS to
allow the EEPROM to update the data.
OVERVIEWThe block diagram in Figure 1 shows the relationship between the major control and memory I/O sectionsof the DS1682. The device has three major components: 1) clock generator and control blocks, 2)
elapsed time counter and accumulator registers, and 3) 2-wire interface.
DS1682
DS1682 BLOCK DIAGRAM Figure 1
SIGNAL DESCRIPTIONSThe following paragraphs describe the function of each pin.
VCC – VCC is a +3-5 volt input supply. A capacitor or other temporary energy source may be required tohold the Voltage 150 mS after the event has completed if the system power is removed at the same time
as the event ends in order to allow the contents of the ETC to be stored properly. With less than the
150 mS of power after the end of the event, the data may be lost. The LSB is written first to be sure thatthe most likely changed data is saved first.
GND - Ground
SCL (2-wire Serial Clock Input) – The SCL pin is the serial clock input for the 2-wire synchronous
communications channel. The SCL pin is an open drain input, which requires an external pull–up
resistor.
SDA (2-wire Input/Output) – The SDA pin is the data Input/Output signal for the 2-wire synchronouscommunications channel. The SDA pin is an open drain I/O, which requires an external pull–up resistor.
EVENT (Event Interrupt Input) – The Event pin is an input that will be activated by an external device tosignify an event has occurred and should be logged. When the pin is pulled high, the Elapsed Time
Counter (ETC) will begin to keep track of the time with quarter second resolution and when the pin ispulled low, the contents of the ETC will be stored to the non-volatile Total Time Accumulator register
and the Event Counter register will be incremented. A pull-down resistor has been internally connected
to the Event input to prevent power-up glitches from triggering a false event. The Event input has a
Glitch filter to prevent very short noise spikes from triggering an event. A capacitor or other temporary
energy source may be required to hold the Voltage 150 mS after the event has completed if the systempower is removed at the same time as the event ends in order to allow the contents of the ETC to be
stored properly. With less than the 150 mS of power after the end of the event, the data may be lost. The
LSB is written first to be sure that the most likely changed data is saved first. When the Event pin
changes states, the 2-wire bus will be unavailable for communications for 200 mS.
EVENT
SDA
SCL
ALARM
DS1682
ALARM# (Alarm Output) - When there is a non-zero number programmed into the Alarm Trip Point
register and a zero in the AoR bit of the Configuration register, the Alarm# output will be enabled and the
DS1682 will begin to monitor the values in the ETC for the programmed value in the Alarm Trip Point
register. When the Polarity bit in the Configuration register is set to a zero the Alarm# output willbecome active when the Alarm Trip Point is exceeded. When the Polarity bit is set to a one, the Alarm#
output will be inactive until the Alarm Trip Point is exceeded. With the AoR bit in the Configuration
register set to a one, the Reset Enable input will be mapped to the Alarm# pin.
N/C (No Connect) – This pin is not connected internally.
MEMORY MAPUserMemory
DS1682
DATA LOGGINGWhen the DS1682 is powered-up, the contents of the Total Time Accumulate register (TTA) are
downloaded to the ETC and the device begins looking for events that trigger the Event input. When an
event triggers the input by transitioning to a high level input, the ETC begins incrementing in quarter
second resolution. When the Event input falls below 0.5*VCC to indicate the end of an Event, a power
failure, or power-down, the contents of the ETC are stored to the non-volatile Total Time Accumulatorregister, the Event Counter register is incremented and the ETC is prepared for the next event. There is a
built in pull-down on the Event input to prevent power-up glitches from triggering a false event. As the
ETC is being incremented, there is a non-zero value in the ATP register and the AoR bit in the
Configuration register is set to a 0, the DS1682 will compare the value in the ETC to the value in the
Alarm Trip Point register to see when the value in the ETC is equal to or greater than the value in theAlarm Trip Point register. When the value in the ETC exceeds the value in the Alarm Trip Point register,
the Alarm# output is enabled/disabled depending on the value of the Polarity bit.
The ETC will not roll over to 0000h once FFFFh is reached. The DS1682 will stop counting time once
FFFFh is reached. This should take approximately 34 years with the event pin pulled high. When theEvent pin is transitioned, the 2-wire bus is not available for communications for 200 mS.
CLOCKThe clock circuitry consists of a calibrated, temperature compensated RC time base and a 32-bit Elapsed
Time Counter (ETC) which increments on the quarter second. The total time of all events is stored in the
non-volatile Total Time Accumulator register. As the ETC is being incremented and there is a non-zerovalue in the ATP register and the AoR bit in the Configuration register is set to a 0, the DS1682 will
compare the value in the ETC to the value in the Alarm Trip Point register to see when the value in the
ETC is equal to or greater than the value in the Alarm Trip Point register. When the value in the ETC
exceeds the value in the Alarm Trip Point register, the Alarm# output is enabled/disabled depending on
the value of the Polarity bit.
TOTAL TIME ACCUMULATOR REGISTERThe Total Time Accumulator register is an EEPROM based 32 bit register that holds the total “ON” time
of all events up to a total of about 34 years worth of event time. This value is not erasable when the Reset
Enable and AoR bits in the Configuration register are set to a zero and does not require a power source to
insure the data’s integrity. This register can only be cleared when the Reset Enable bit in theConfiguration register is set to a one or the AoR bit is set to a 1 with the Alarm# pin held high, and the
Reset command is sent via the 2-wire bus. A capacitor or other temporary energy source may be required
to hold the Voltage 150 mS after the event has completed if the system power is removed at the same
time as the event ends in order to allow the contents of the ETC to be stored properly. With less than the
150 mS of power after the end of the event, the data may be lost. The LSB is written first to be sure thatthe most likely changed data is saved first.
ALARM TRIP POINT REGISTERThe Alarm Trip Point register (ATP) is a 32-bit register that holds the time value in quarter seconds that
is set by the user via the 2-wire bus to enable/disable the Alarm# output when the value is equal to or
greater than the value in the ETC.
EVENT COUNTER REGISTERThis 17-bit register set provides the total number of data samples that have been logged during the life of
DS1682
Over bit is set to a 1 the first time that the 2 byte Event Counter reaches FFh and rolls over to 00h. Once
the Event Roll Over bit is set to a 1 and the Event Counter reaches FFh, event counting will stop and the
event counter will not roll over to 00h again. This value is not erasable when the Reset Enable and the
AoR bits in the Configuration register are set to a zero and does not require a power source to maintainthe contents to insure the data’s integrity. This register can only be cleared when the Reset Enable bit is
set to a one or the AoR bit is set to a 1 and the Alarm# pin is held high, and the Reset command is sent
via the 2-wire bus.
RESET COMMANDThe DS1682 can only be reset when the Reset Enable bit is set to a one or the AoR bit is set to a one with
the Alarm# pin held high, and the Reset command is sent via the 2-wire bus by writing 55h into memorylocation 1Dh. With the Reset Enable bit set to a 0, the AoR bit set to a 0 or the AoR bit set to a 1 and the
Alarm# pin held low, the Reset command is ignored by the DS1682. With the Write Disable flag set to a
1, the contents of the Alarm Trip Point and the Configuration register that are protected/locked by this bit
can not be written to or erased, even if the Reset Enable bit is set to a 1. The Reset command when the
Reset Enable bit is set to a one or the AoR bit set to a 1 and Alarm# held high, will erase the contents ofthe Elapsed Time Counter, Total Time Accumulator, and Event Counter. The Reset Command will
always read 0 if the memory location is read by the user.
CONFIGURATION REGISTERMSbLSb
AoR – Alarm or Reset Enable - The Alarm or Reset Enable bit maps either the Alarm output or the ResetEnable Input to the Alarm# pin. With the AoR bit set to a zero, the Alarm output will be mapped to the
Alarm# pin. When the AoR bit is set to a one, the Reset Enable input will be mapped to the Alarm# pin.
The standard factory setting for the AoR bit is 0. The Reset Enable input is OR’ed with the RE bit and
will perform the same function only from outside the device.
The Reset Enable input, if pulled high, will allow the D1682 to accept the Reset command via the 2-wire
bus to clear the Total Time Accumulator and Event Counter. If the Reset Enable input is pulled low, the
DS1682 will not respond to the 2-wire command to reset the Total Time Accumulator register or the
Event Counter to zero. This input allows the designer to permanently enable the reset function, enable
the function during the manufacturing process and then disable it, or turn it on and off when theauthorized repair person has completed repairing or calibrating the equipment. There is no security
provided to this pin to prevent someone from enabling the reset function at any time by pulling the pin
high. The security will have to be provided by the system and/or enclosure, if required. If a switch or
button is used to Configuration the Reset Enable input, a debounce capacitor should be used to prevent
spikes on the input.
AF – Alarm Flag - The Alarm Flag is set to a 1 when the Alarm# output is activated. If the Alarm# pinis not activated or enabled, the Alarm Flag will be set to a 0. This bit can be cleared by the reset
command, but will be set again at the end of the next event in which the ETC and ATP values cause the
Alarm# pin to be enabled or activated. This bit can not be written by the user.
WDF – Write Disable Flag – When the Write Disable Command is written to AAh twice at memory
location 1Eh, the WDF will be set to a 1 and can not be cleared or reset. When the WDF is set to a 1, the
DS1682
the WDF is set to a 0, the Alarm Trip Point, Configuration register, Total Time Accumulator, Elapsed
Time Counter, and Event Counter can be written to(if user writable), erased or read.
WMDF – Write Memory Disable Flag – When the Write Memory Disable command is written to F0htwice at memory location 1Fh, the WMDF will be set to a 1 and will not be able to be reset or cleared.
Once the WMDF is set to a 1, the 10 byte User Memory will become read-only. When the WMDF is a 0,
the User Memory will function like normal EEPROM.
AOS – Alarm Output Select – The AOS bit selects the output type for the Alarm# pin. With the AOS bitset to a 0, the output will be a constant low when Alarm# is active to burn a fuse, interrupt a processor or
send a logic signal to other digital circuitry. With the AOS bit a 1, the output of the Alarm# pin will be
pulled low four times to flash an LED or communicate with an other device at power up, when the
Alarm# pin is pulled low and release or when the alarm becomes active.
RE – Reset Enable – The Reset Enable bit will allow the device to be reset by enabling the Reset
command. The sections of the 1682 that will be reset is then dependent on the value in the Write Disable
Flag. With the WDF set to 0 and the Reset Enable bit set to a 1, the Reset command will clear the
Elapsed Time Counter, Total Time Accumulate, and Event Counter. When the Reset Enable bit is set to a
0, the Reset command will be disabled.
AP – Alarm Polarity – The Alarm Polarity bit is intended to allow the Alarm to become active or enabledwhen the Total Time Accumulate register is equal to or greater than the Alarm Trip Point register value
(AP=1), or conversely, to allow the Alarm to become active or enabled when the Total Time Accumulate
register is less than the Alarm Trip Point register value (AP=0). This feature allows the user to have theAlarm output after the values match (AP=1) or up until the values match (AP=0).
ERO – Event Counter Roll Over – The ERO bit acts like the 17th bit of the Event Counter. When the
Event Counter reaches FFh the first time, the next event will cause the ERO to transition from a 0 to a 1
and the Event Counter will roll over to 00h. Once the ERO is set to a 1, the Event Counter will not rollover again. The Event Counter will stop counting events when the ERO is set to 1 and the Event Counter
is set to FFh.
WRITE DISABLE/WRITE MEMORY DISABLEThe 1682 has two 8 bit registers designed to prevent parts of the device from being written to or erased.
These registers will always read 0 if read by the user, but the Write Disable Flag (WDF) and Write
Memory Disable Flag (WMDF) in the Configuration register will indicate the ability or inability to writethe memory locations.
Write Memory Disable – This register when written two times consecutively to F0h at memory location
1Fh will disable the ability to write to the 10 Bytes of User memory. It will not affect the Alarm Trip
Point register, Total Time Accumulate register, Configuration register, Event Counter, Write Disableregister, or the Reset command. Once the Write Memory Disable written is written to F0h, it will set the
Write Memory Disable Flag in the Configuration register to a 1 and it can not be reset to 0 to allow
writing to the User memory and the memory is permanently disabled from future writes. The memory
becomes Read-Only.
Write Disable – After being written two times consecutively to AAh at memory location 1Eh, will
disabled writes to the device by setting the Write Disable flag in the Configuration register to a 1,
