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DS1670E-DS1670S
Portable System Controller
FEATURESProvides real time clock:Counts seconds, minutes, hours, date of
the month, month, day of the week, andyear with leap year compensation valid up
to 2100Power control circuitry supports system
power-on from day/time alarmMicroprocessor monitor:Halts microprocessor during power failAutomatically restarts microprocessorafter power failureMonitors pushbutton for external overrideHalts and resets an out of control
microprocessorNV RAM control:Automatic battery backup and writeprotection to external SRAM3-channel, 8-bit analog-to-digital converterSimple 3-wire interface3.3V operation
PIN ASSIGNMENT
Package Dimension Information can be found at:
http://www.dalsemi.com/datasheets/mechdwg.html
ORDERING INFORMATION
DS1670E20-pinTSSOP
DS1670S20-pinSOIC
DESCRIPTION
The Portable System Controller is a circuit, which incorporates many of the functions necessary for lowpower portable products integrated into one chip. The DS1670 provides a Real Time Clock, NV RAM
controller, microprocessor monitor, and a 3-channel, 8-bit analog-to-digital converter. Communication
with the DS1670 is established through a simple 3-wire interface.
The Real Time Clock (RTC) provides seconds, minutes, hours, day, date, month, and year information
with leap year compensation. The RTC also provides an alarm interrupt. This interrupt works when the
DS1670 is powered by the system power supply or when in battery backup operation so the alarm can be
used to wake up a system that is powered down.
Automatic backup and write protection of an external SRAM is provided through the VCCO, CEOL, and
CEOH pins. The backup energy source used to power the RTC is also used to retain RAM data in the
VCC
AIN1
RST
BHE
VBAT
VCCO
CEOL
CEOH
INT
GND
20-Pin TSSOP (4.4mm)
20-Pin SOIC (300 mil)
DS1670
DS1670
The microprocessor monitor circuitry of the DS1670 provides three basic functions. First, a precision
temperature-compensated reference and comparator circuit monitors the status of VCC. When an out-of-
tolerance condition occurs, an internal power-fail signal is generated which forces the reset to the active
state. When VCC returns to an in-tolerance condition, the reset signals are kept in the active state for250 ms to allow the power supply and processor to stabilize. The second microprocessor monitor
function is pushbutton reset control. The DS1670 debounces a pushbutton input and guarantees an active
reset pulse width of 250 ms. The third function is a watchdog timer. The DS1670 has an internal timer
that forces the reset signals to the active state if the strobe input is not driven low prior to watchdog
time-out.
The DS1670 also provides a 3-channel, 8-bit successive approximation analog-to-digital converter. The
converter has an internal 2.55-volt (typical) reference voltage generated by an on-board band-gap circuit.
The A/D converter is monotonic (no missing codes) and has an internal analog filter to reduce high
frequency noise.
OPERATION
The block diagram in Figure 1 shows the main elements of the DS1670. The following paragraphs
describe the function of each pin.
DS1670 BLOCK DIAGRAM Figure 1

SIGNAL DESCRIPTIONS
VCC, GND - DC power is provided to the device on these pins. VCC is the +3.3 volt input. When
3.3 volts are applied within nominal limits, the device is fully accessible and data can be written and read.When VCC drops below 2.88 volts (typical) access to the device is prohibited. When VCC drops below the
lower of VBAT and 2.7 volts (typical), the device is switched over to the backup power supply.
VBAT (Backup Power Supply) - Battery input for standard 3-volt lithium cell or other energy source.
SCLK (Serial Clock Input) - SCLK is used to synchronize data movement on the serial interface.
I/O (Data Input/Output) - The I/O pin is the bi-directional data pin for the 3-wire interface.
DS1670
CS (Chip Select) - The Chip Select signal must be asserted high during a read or a write for
communication over the 3-wire serial interface. CS had an internal 40k ohm pull down resistor.
VCCO (External SRAM Power Supply Output) - This pin is internally connected to VCC when VCC iswithin nominal limits. However, during power fail VCCO is internally connected to the VBAT pin.
Switchover occurs when VCC drops below the lower of VBAT or 2.7 volts.
INT (Interrupt Output) - The INT pin is an active high output of the DS1670 that can be used as an
interrupt input to a microprocessor. The INT output remains high as long as the status bit causing theinterrupt is present and the corresponding interrupt-enable bit is set. The INT pin operates when the
DS1670 is powered by VCC or VBAT.
CEI (RAM Chip Enable In) - CEI must be driven low to enable the external RAM.
BLE (Byte Low Enable input) - This pin when driven low activates the CEOL output if CEI is also
driven low.
BHE (Byte High Enable input) - This pin when driven low activates the CEOH output if CEI is alsodriven low.
CEOL (RAM Chip Enable Out Low) - Chip enable output for low order SRAM byte.
CEOH (RAM Chip Enable Out High) - Chip enable output for high order SRAM byte. (Strobe Input) - The Strobe input pin is used in conjunction with the watchdog timer. If the ST pin
is not driven low within the watchdog time period, the RST pin is driven low.
RST (Reset) - The RST pin functions as a microprocessor reset signal. This pin is driven low 1) when
VCC is outside of nominal limits; 2) when the watchdog timer has “timed out”; 3) during the power up
reset period; and 4) in response to a pushbutton reset. The RST pin also functions as a pushbutton reset
input. When the RST pin is driven low, the signal is debounced and timed such that a RST signal of at
least 250 ms is generated. This pin has an open drain output with an internal 47 kΩ pull-up resistor.
AIN0, AIN1, AIN2 (Analog Inputs) - These pins are the three analog inputs for the 3-channel analog-to-digital converter.
X1, X2 - Connections for a standard 32.768 kHz quartz crystal. For greatest accuracy, the DS1670 must
be used with a crystal that has a specified load capacitance of 6 pF. There is no need for external
capacitors or resistors. Note: X1 and X2 are very high impedance nodes. It is recommended that theyand the crystal be guard-ringed with ground and that high frequency signals be kept away from the crystal
area. For more information on crystal selection and crystal layout considerations, please consult
Application Note 58, “Crystal Considerations with Dallas Real Time Clocks.”
The DS1670 will not function without a crystal.
DS1670
POWER-UP/POWER-DOWN CONSIDERATIONSThe DS1670 was designed to operate with a power supply of 3.3 volts. When 3.3 volts are applied within
nominal limits, the device becomes fully accessible after tRPU (250 ms typical). Before tRPU elapses, all
inputs are disabled. When VCC drops below 2.88 volts (typical), the RST pin is driven low. When VCC
drops below the lower of 2.7 volts (typical) or the battery voltage, the device is switched over to the
backup power supply.
During power up, when VCC returns to an in-tolerance condition, the RST pin is kept in the active state
for 250 ms (typical) to allow the power supply and microprocessor to stabilize.
ADDRESS/COMMAND BYTEThe command byte for the DS1670 is shown in Figure 2. Each data transfer is initiated by a command
byte. Bits 0 through 6 specify the addresses of the registers to be accessed. The MSB (bit 7) is the
Read/Write bit. This bit specifies whether the accessed byte will be read or written. A read operation is
selected if bit 7 is a 0 and a write operation is selected if bit 7 is a 1. The address map for the DS1670 is
shown in Figure 3.
ADDRESS/COMMAND BYTE Figure 2543210
DS1670 ADDRESS MAP Figure 3
BIT 7BIT 00209
DS1670
CLOCK, CALENDAR AND ALARM
The time and calendar information is accessed by reading/writing the appropriate register bytes. Note
that some bits are set to 0. These bits will always read 0 regardless of how they are written. Also note
that registers 0 Fh to 7 Fh are reserved. These registers will always read 0 regardless of how they are
written. The contents of the time, calendar, and alarm registers are in the Binary-Coded Decimal (BCD)
format.
The DS1670 can run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the
12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is
the AM/PM bit with logic 1 being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20-23
hours).
The DS1670 also contains a time of day alarm. The alarm registers are located in registers 07h to 0 Ah.
Bit 7 of each of the alarm registers are mask bits (see Table 1). When all of the mask bits are logic 0, an
alarm will occur once per week when the values stored in timekeeping registers 00h to 03h match the
values stored in the time of day alarm registers. An alarm will be generated every day when mask bit ofthe day alarm register is set to 1. An alarm will be generated every hour when the day and hour alarm
mask bits are set to 1. Similarly, an alarm will be generated every minute when the day, hour, and minute
alarm mask bits are set to 1. When day, hour, minute, and seconds alarm mask bits are set to 1, an alarm
will occur every second.
TIME OF DAY ALARM BITS Table 1
SPECIAL PURPOSE REGISTERS
The DS1670 has two additional registers (control register and status register) that control the real time
clock and interrupts.
CONTROL REGISTER
EOSC (Enable oscillator) - This bit when set to logic 0 will start the oscillator. When this bit is set to a
logic 1, the oscillator is stopped and the DS1670 is placed into a low-power standby mode with a current
drain of less than 200 nanoamps when in battery back-up mode. When the DS1670 is powered by VCC,
the oscillator is always on regardless of the status of the EOSC bit; however, the real time clock is
incremented only when EOSC is a logic 0.
DS1670
AIS0-AIS1 (Analog Input Select) - These 2 bits are used to determine the analog input for the analog-to-
digital conversion. Table 2 lists the specific analog input that is selected by these two bits.
AIE (Alarm Interrupt Enable) - When set to a logic 1, this bit permits the Interrupt Request Flag(IRQF) bit in the status register to assert INT. When the AIE bit is set to logic 0, the IRQF bit does not
initiate the INT signal.
ANALOG INPUT SELECTION Table 2
STATUS REGISTER
CU (Conversion Update In Progress) - When this bit is a 1, an update to the ADC Register (register0Eh) will occur within 488 ms. When this bit is a 0, an update to the ADC Register will not occur for at
least 244 ms.
LOBAT (Low Battery Flag) - This bit reflects the status of the backup power source connected to the
V BAT pin. When VBAT is greater than 2.5 volts, LOBAT is set to a logic 0. When VBAT is less than 2.3volts, LOBAT is set to a logic 1.
IRQF (Interrupt Request Flag) - A logic 1 in the Interrupt Request Flag bit indicates that the current
time has matched the time of day Alarm registers. If the AIE bit is also a logic 1, the INT pin will go
high. IRQF is cleared by reading or writing to any of the alarm registers.
POWER-UP DEFAULT STATES
These bits are set to a one upon initial power-up: EOSC, TD1 and TD0. These bits are cleared upon
initial power-up: WP, AIS1, and AIS0.
NONVOLATILE SRAM CONTROLLER
The DS1670 provides automatic backup and write protection for external SRAM. This function is
provided by gating the chip enable signals and by providing a constant power supply through the VCCO
pin. The DS1670 was specifically designed with the Intel 80186 and 386EX microprocessors in mind.As such, the DS1670 has the capability to provide access to the external SRAM in either byte-wide or
word-wide format. This capability is provided by the chip enable scheme. Three input signals and two
output signals are used for enabling the external SRAM(s) (see Figure 4). CEI (chip enable in), BHE
(byte high enable), and BLE (byte low enable) are used for enabling either one or two external SRAMs
through the CEOL (chip enable low) and the CEOH (chip enable high) outputs. Table 3 illustrates the
function of these pins.
DS1670
The DS1670 nonvolatilizes the external SRAM(s) by write protecting the SRAM(s) and by providing a
back-up power supply in the absence of VCC. When VCC falls below 2.88 volts (typical), access to the
external SRAM(s) are prohibited by forcing CEOL and CEOH high regardless of the level of CEI, BLE,
and BHE. Also at this point, the SRAM power supply (VCCO) is switched from VCC to VBAT. Uponpower up, access is prohibited until the end of tRPU.
DS1670
EXTERNAL SRAM CHIP ENABLE Table 3
EXTERNAL SRAM INTERFACE (WORD-WIDE) TO THE DS1670 Figure 4
MICROPROCESSOR MONITOR
The DS1670 monitors three vital conditions for a microprocessor: power supply, software execution, and
external override.
First, a precision temperature-compensated reference and comparator circuit monitors the status of VCC.
When an out-of-tolerance condition occurs, an internal power-fail signal is generated which forces the
RST pin to the active state, thus warning a processor-based system of impending power failure. The
power-fail trip point is 2.88 volts (typical). When VCC returns to an in-tolerance condition upon power-
up, the reset signal is kept in the active state for 250 ms (typical) to allow the power supply and
microprocessor to stabilize. Note, however, that if the EOSC bit is set to a logic 1 (to disable the
oscillator during battery back-up mode), the reset signal will be kept in an active state for 250 ms plus the
start-up time of the oscillator.
The second monitoring function is pushbutton reset control. The DS1670 provides for a pushbutton
switch to be connected to the RST output pin. When the DS1670 is not in a reset cycle, it continuously
monitors the RST signal for a low-going edge. If an edge is detected, the DS1670 will debounce the
switch by pulling the RST line low. After the internal 250 ms timer has expired, the DS1670 will
continue to monitor the RST line. If the line is still low, the DS1670 will continue to monitor the line
DS1670
The third microprocessor monitoring function provided by the DS1670 is a watchdog timer. The
watchdog timer function forces RST to the active state when the ST input is not stimulated within the
predetermined time period. The time period is set by the Time Delay (TD) bits in the Watchdog Register.
The time delay can be set to 250 ms, 500 ms, or 1000 ms (see Figure 5). If TD0 and TD1 are both set to
0, the watchdog timer is disabled. When enabled, the watchdog timer starts timing out from the set time
period as soon as RST is inactive. The default setting is for the watchdog timer to be enabled with
1000 ms time delay. If a high-to-low transition occurs on the ST input pin prior to time-out, thewatch-dog timer is reset and begins to time-out again. If the watchdog timer is allowed to time-out, then
the RST signal is driven to the active state for 250 ms (typical). The ST input can be derived frommicroprocessor address signals, data signals, and/or control signals. To guarantee that the watchdog
timer does not time-out, a high-to-low transition must occur at or less than the minimum period.
WATCHDOG TIME-OUT CONTROL Figure 5
ANALOG-TO-DIGITAL CONVERTER
The DS1670 provides a 3-channel, 8-bit analog-to-digital converter. The A/D reference voltage (2.55V
typical) is derived from an on-chip band-gap circuit. Three multiplexed analog inputs are provided
through the AIN0, AIN1, and AIN2 pins. The A/D converter is monotonic (no missing codes) and uses a
successive approximation technique to convert the analog signal into a digital code. An A/D conversionis the process of assigning a digital code to an analog input voltage. This code represents the input value
as a fraction of the full-scale voltage (FSV) range. Thus the FSV range is then divided by the A/D
converter into 256 codes (8 bits). The FSV range is bounded by an upper limit equal to the reference
voltage and the lower limit, which is ground. The DS1670 has a FSV of 2.55V (typical) which provides a
resolution of 10 mV. An input voltage equal to the reference voltage converts to FFh while an inputvoltage equal to ground converts to 00h. The relative linearity of the A/D converter is ±0.5 LSB.
The A/D converter selects from one of three different analog inputs (AIN0 - AIN2). The input that is
selected is determined by the Analog Input Select (AIS) bits in the Control Register. Table 2 lists the
specific analog input that is selected by these 2 bits. Note also that the converter can be turned off bythese bits to reduce power. When the A/D is turned on by setting AIS0 and AIS1 to any value other than
0,0 the analog input voltage is converted and written to the ADC Register within 488 ms. An internal
analog filter at the input reduces high frequency noise. Subsequent updates occur approximately every
10 ms. If AIS0 and/or AIS1 are changed, updates will occur at the next 10 ms conversion time.

Partno	Mfg	Dc	Qty	Available	Descript
DS1670E	DALLAS	N/a	1669	avai	Portable System Controller
DS1670S	DALLAS	N/a	48	avai	Portable System Controller