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DS1624 ,Digital Thermometer and Memoryblock diagram of the DS1624 is shown in Figure 1. The DS1624 consists of two separate functional2u ..
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DS1624S ,Digital Thermometer and Memoryblock diagram of the DS1624 is shown in Figure 1. The DS1624 consists of two separate functional2u ..
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DS1624
Digital Thermometer and Memory
FEATURES Temperature measurements require no
external components Measures temperatures from -55°C to +125°C
in 0.03125°C increments. Fahrenheitequivalent is -67°F to +257°F in 0.05625°F
increments Temperature is read as a 13-bit value (two
byte transfer)§ Converts temperature to digital word in 1
second (max) 256 bytes of E2 memory on board for storing
information such as frequency compensation
coefficients§ Data is read from/written via a 2-wire serial
interface (open drain I/O lines) Applications include temperature-
compensated crystal oscillators for test
equipment and radio systems§ 8-pin DIP or SOIC packages
PIN ASSIGNMENT
PIN DESCRIPTION
SDA- 2-Wire Serial Data Input/Output
SCL- 2-Wire Serial ClockGND- Ground- Chip Address Input- Chip Address Input- Chip Address InputVDD- Digital Power Supply (+3V - +5V)- No Connection
DESCRIPTION
The DS1624 consists of a digital thermometer and 256 bytes of E2 memory. The thermometer provides
13-bit temperature readings which indicate the temperature of the device. The E2 memory allows a user to
store frequency compensation coefficients for digital correction of crystal frequency due to temperature.Any other type of information may also reside in this user space.
Digital Thermometer and Memory
See Mech Drawings Section
See Mech Drawings Section
DS1624
DETAILED PIN DESCRIPTION Table 1
OVERVIEW
A block diagram of the DS1624 is shown in Figure 1. The DS1624 consists of two separate functional
units: 1) a 256–byte nonvolatile E2 memory, and 2) a direct–to–digital temperature sensor.
The nonvolatile memory is made up of 256 bytes of E2 memory. This memory may be used to store anytype of information the user wishes; for example, frequency compensation coefficients may be placed in
this memory to allow for compensation of measured frequency depending upon the temperature at which
the measurement is made. These memory locations are accessed through the 2–wire serial bus.
The direct to digital temperature sensor allows the DS1624 to measure the ambient temperature and
report the temperature value in a 13–bit word, with 0.03125°C resolution. The temperature sensor and its
related registers are accessed through the 2–wire serial interface.
DS1624 FUNCTIONAL BLOCK DIAGRAM Figure 1
DS1624
2-WIRE SERIAL DATA BUS
The DS1624 supports a bi–directional two–wire bus and data transmission protocol. A device that sendsdata onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that
controls the message is called a “master”. The devices that are controlled by the master are “slaves”. The
bus must be controlled by a master device which generates the serial clock (SCL), controls the bus access,
and generates the START and STOP conditions. The DS1624 operates as a slave on the two–wire bus.Connections to the bus are made via the open–drain I/O lines SDA and SCL. The following bus protocol
has been defined (See Figure 2): Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is high will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH,
defines a START condition.
Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is
HIGH, defines the STOP condition.
Data valid: The state of the data line represents valid data when, after a START condition, the data lineis stable for the duration of the HIGH period of the clock signal. The data on the line must be changed
during the LOW period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition The
number of data bytes transferred between START and STOP conditions is not limited, and is determinedby the master device. The information is transferred byte–wise and each receiver acknowledges with a
ninth bit.
Within the bus specifications a regular mode (100 KHz clock rate) and a fast mode (400 KHz clock rate)
are defined. The DS1624 works in both modes.
Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the
reception of each byte. The master device must generate an extra clock pulse which is associated with this
acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into account. A master must signal an end of data to the slave
by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case,
the slave must leave the data line HIGH to enable the master to generate the STOP condition.
DS1624
DATA TRANSFER ON 2-WIRE SERIAL BUS Figure 2
Figure 2 details how data transfer is accomplished on the two–wire bus. Depending upon the state of theW bit, two types of data transfer are possible:
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
2. Data transfer from a slave transmitter to a master receiver. The first byte (the slave
address) is transmitted by the master. The slave then returns an acknowledge bit. Next follows a
number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit
after all received bytes other than the last byte. At the end of the last received byte, a ‘not
acknowledge’ is returned.
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released.
The DS1624 may operate in the following two modes:
1. Slave receiver mode: Serial data and clock are received through SDA and SCL. After each byte is
received an acknowledge bit is transmitted. START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address recognition is performed by hardware after reception
of the slave address and direction bit.
2. Slave transmitter mode: The first byte is received and handled as in the slave receiver mode.
However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data
is transmitted on SDA by the DS1624 while the serial clock is input on SCL. START and STOP
conditions are recognized as the beginning and end of a serial transfer.
SLAVE ADDRESS
A control byte is the first byte received following the START condition from the master device. The
control byte consists of a four bit control code; for the DS1624, this is set as 1001 binary for read and
DS1624
three least significant bits of the slave address. The last bit of the control byte (R/W) defines the
operation to be performed. When set to a “1”, a read operation is selected, when set to a “0”, a write
operation is selected. Following the START condition the DS1624 monitors the SDA bus checking the
device type identifier being transmitted. Upon receiving the 1001 code and appropriate device select bits,
the slave device outputs an acknowledge signal on the SDA line.
2-WIRE SERIAL COMMUNICATION WITH DS1624 Figure 3
OPERATION-MEASURING TEMPERATURE
A block diagram of the DS1624 is shown in Figure 1. The DS1624 measures temperatures through the
use of an on–board proprietary temperature measurement technique. A block diagram of the temperaturemeasurement circuitry is shown in Figure 4.
The DS1624 measures temperature by counting the number of clock cycles that an oscillator with a low
temperature coefficient goes through during a gate period determined by a high temperature coefficient
oscillator. The counter is preset with a base count that corresponds to –55°C. If the counter reaches zero
before the gate period is over the temperature register, which is also preset to the –55°C value, is
incremented indicating that the temperature is higher than –55°C.
At the same time, the counter is preset with a value determined by the slope accumulator circuitry. Thiscircuitry is needed to compensate for the parabolic behavior of the oscillators over temperature. The
counter is then clocked again until it reaches zero. If the gate period is still not finished, then this process
repeats.
The slope accumulator is used to compensate for the nonlinear behavior of the oscillators over
temperature, yielding a high resolution temperature measurement. This is done by changing the number
of counts necessary for the counter to go through for each incremental degree in temperature. To obtain
the desired resolution, both the value of the counter and the number of counts per °C (the value of the
slope accumulator) at a given temperature must be known.
DS1624
TEMPERATURE MEASURING CIRCUITRY Figure 4
Internally, this calculation is performed by the DS1624 to provide 0.03125°C resolution. The temperature
reading is provided in a 13–bit, two’s complement reading by issuing READ TEMPERATURE
command. Table 2 describes the exact relationship of output data to measured temperature. The data istransmitted serially through the 2–wire serial interface, MSB first. The DS1624 can measure temperature
over the range of -55°C to +125°C in 0.03125°C increments. For Fahrenheit usage a lookup table or
conversion factor must be used.
TEMPERATURE/DATA RELATIONSHIPS Table 2
Since data is transmitted over the 2–wire bus MSB first, temperature data may be written to/read from the
DS1624 as either a single byte (with temperature resolution of 1°C) or as two bytes, the second byte
DS1624
Temperature is represented in the DS1624 in terms of a 0.03125°C LSB, yielding the following 13–bit
format:
OPERATION AND CONTROL
A configuration/status register is used to determine the method of operation of the DS1624 will use in a
particular application as well as indicating the status of the temperature conversion operation.
The configuration register is defined as follows:
CONFIGURATION/STATUS REGISTER
where
DONE=Conversion Done bit. “1” = Conversion complete, “0” = conversion in progress.
1SHOT=One Shot Mode. If 1SHOT is “1”, the DS1624 will perform one temperature conversion upon
receipt of the Start Convert T protocol. If 1SHOT is “0”, the DS1624 will continuously perform
temperature conversions. This bit is nonvolatile and the DS1624 is shipped with 1SHOT = “0”.
Since the configuration register is implemented in E2, writes to the register require 10 ms to complete.
After issuing a command to write to the configuration register, no further accesses to the DS1624 should
be made for at least 10 ms.
OPERATION – MEMORY
BYTE PROGRAM MODE
In this mode, the master sends addresses and one data byte to the DS1624.
Following a START condition, the device code (4–bit), the slave address (3 bit), and the R/W bit, which
is logic LOW, are placed onto the bus by the master. The master then sends the Access Memory protocol.
This indicates to the addressed DS1624 that a byte with a word address will follow after it has generated
an acknowledge bit. Therefore, the next byte transmitted by the master is the word address and will be
written into the address pointer of the DS1624. After receiving the acknowledge of the DS1624, themaster device transmits the data word to be written into the addressed memory location. The DS1624
acknowledges again and the master generates a STOP condition. This initiates the internal programming
cycle of the DS1624. A repeated START condition, instead of a STOP condition, will abort the
programming operation.
During the programming cycle the DS1624 will not acknowledge any further accesses to the device until
the programming cycle is complete (approximately 10 ms.)
= +25.0625°C
DS1624
PAGE PROGRAM MODE
To program the DS1624 the master sends addresses and data to the DS1624 which is the slave. This isdone by supplying a START condition followed by the 4–bit device code, the 3–bit slave address, and theW bit which is defined as a logic LOW for a write. The master then sends the Access Memory
protocol. This indicates to the addressed slave that a word address will follow. The slave outputs the
acknowledge pulse to the master during the ninth clock pulse. When the word address is received by the
DS1624 it is placed in the address pointer defining which memory location is to be written. The DS1624will generate an acknowledge after every 8–bits received and store them consecutively in an 8–byte RAM
until a STOP condition is detected which initiates the internal programming cycle.
A repeated START condition, instead of a STOP condition, will abort the programming operation.
During the programming cycle the DS1624 will not acknowledge any further accesses to the device until
the programming cycle is complete (approximately 10 ms).
If more than 8 bytes are transmitted by the master the DS1624 will roll over and overwrite the data
beginning with the first received byte. This does not affect erase/ write cycles of the EEPROM array and
is accomplished as a result of only allowing the address register’s bottom 3 bits to increment while theupper 5 bits remain unchanged. The DS1624 is capable of 50,000 writes (25,000 erase/write cycles)
before EEPROM wear out may occur.
If the master generates a STOP condition after transmitting the first data word, byte programming mode
is entered.
READ MODE
In this mode, the master is reading data from the DS1624 E2 memory. The master first provides the slave
address to the device with R/W set to “0”. The master then sends the Access Memory protocol and, after
receiving an acknowledge, then provides the word address, which is the address of the memory location
at which it wishes to begin reading. Note that while this is a read operation the address pointer must first
be written. During this period the DS1624 generates acknowledge bits as defined in the appropriate
section.
The master now generates another START condition and transmits the slave address. This time the R/W
bit is set to “1” to put the DS1624 in read mode. After the DS1624 generates the acknowledge bit it
outputs the data from the addressed location on the SDA pin, increments the address pointer, and, if it
receives an acknowledge from the master, transmits the next consecutive byte. This auto-increment
sequence is only aborted when the master sends a STOP condition instead of an acknowledge. When theaddress pointer reaches the end of the 256–byte memory space (address FFh) it will increment from the
end of the memory back to the first location of the memory (address 00h).
COMMAND SET
Data and control information is read from and written to the DS1624 in the format shown in Figure 3. To
write to the DS1624, the master will issue the slave address of the DS1624 and the R/W bit will be set to0”. After receiving an acknowledge the bus master provides a command protocol. After receiving thisprotocol the DS1624 will issue an acknowledge then the master may send data to the DS1624. If the
DS1624 is to be read, the master must send the command protocol as before then issue a repeated START
condition and the control byte again, this time with the R/W bit set to “1” to allow reading of the data

Partno	Mfg	Dc	Qty	Available	Descript
DS1624	DALLAS	N/a	500	avai	Digital Thermometer and Memory