DS1390U-33+T&R ,Low-Voltage SPI/3-Wire RTCs with Trickle ChargerFeaturesDS1393U-33+ 3.3 10 μSOP 1393 rr-33 ♦ Real-Time Clock Counts Hundredths of Seconds,DS1394U-3 ..
DS1391 ,Low-Voltage SPI/3-Wire RTCs with Trickle ChargerApplications Ordering InformationHand-Held DevicesPIN-PART TEMP RANGE TOP MARKGPS/Telematics Device ..
DS1395 ,RAMified real time clockDS1395/DS1397DS1395/DS1397RAMified Real Time Clock
DS1397 ,RAMified real time clockPIN DESCRIPTIONS cessible. Registers are selected by the A0 line. Data isV V – Bus operational p ..
DS1402D-41+ ,iButton Probe Blue Dot SubassemblyFeatures Mounting Pad Layout ® Spring-Mounted iButton Reader .82in Momentary Contact for Both ..
DS1402D-DR8+ ,1-Wire Network CablesApplications of the DS1402-series 1-Wire network cables range from software protection and access c ..
DTC143TS , DTA/DTC SERIES
DTC143TS , DTA/DTC SERIES
DTC143XE , 100mA / 50V Digital transistors (with built-in resistors)
DTC143XK , DTA/DTC SERIES
DTC143XM , 100mA / 50V Digital transistors (with built-in resistors)
DTC143XS , DTA/DTC SERIES
DS1390U-33+T&R
Low-Voltage SPI/3-Wire RTCs with Trickle Charger
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
General DescriptionThe low-voltage serial-peripheral interface (SPI™)
DS1390/DS1391/DS1394 and the low-voltage 3-wire
DS1392/DS1393 real-time clocks (RTCs) are clocks/cal-
endars that provide hundredths of a second, seconds,
minutes, hours, day, date, month, and year information.
The date at the end of the month is automatically
adjusted for months with fewer than 31 days, including
corrections for leap year. The clock operates in either
the 24-hour or 12-hour format with an AM/PM indicator.
One programmable time-of-day alarm is provided. A
temperature-compensated voltage reference monitors
the status of VCCand automatically disables the bus
interface and switches to the backup supply if a power
failure is detected. On the DS1390, a single open-drain
output provides a CPU interrupt or a square wave at
one of four selectable frequencies. The DS1391
replaces the SQW/INTpin with a RSToutput/
debounced input.
The DS1390, DS1391, and DS1394 are programmed
serially through an SPI-compatible, bidirectional bus.
The DS1392 and DS1393 communicate over a 3-wire
serial bus, and the extra pin is used for either a sepa-
rate interrupt pin or a RSToutput/debounced input.
All five devices are available in a 10-pin µSOP package,
and are rated over the industrial temperature range.
ApplicationsHand-Held Devices
GPS/Telematics Devices
Embedded Time Stamping
Medical Devices
FeaturesReal-Time Clock Counts Hundredths of Seconds,
Seconds, Minutes, Hours, Day, Date, Month, and
Year with Leap-Year Compensation Valid Up to
2100Output Pin Configurable as Interrupt or Square
Wave with Programmable Frequency of
32.768kHz, 8.192kHz, 4.096kHz, or 1Hz
(DS1390/DS1393/DS1394 Only)One Time-of-Day AlarmPower-Fail Detect and Switch CircuitryReset Output/Debounced Input (DS1391/DS1393)Separate SQW and INT Output (DS1392)Trickle-Charge CapabilitySPI Supports Modes 0 and 2 (DS1394)SPI Supports Modes 1 and 3 (DS1390/DS1391)3-Wire Interface (DS1392/DS1393)4MHz at 3.0V and 3.3V1MHz at 1.8VThree Operating Voltages: 1.8V ±5%, 3.0V ±10%,
and 2.97 to 5.5V (DS1394: 3.3V ±10%)Industrial Temperature Range: -40°C to +85°CUnderwriters Laboratories (UL) Recognized
Ordering Information
Typical Operating Circuits and Pin Configurations appear at
end of the data sheet.
Note:All devices are rated for the -40°C to +85°C operating
temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
†A “+” anywhere on the top mark denotes a lead(Pb)-
free/RoHS-compliant package.
rr = Revision code on second line of top mark.
PART
TYP
OPERATING
VOLTAGE (V)
PIN-
PACKAGETOP MARK†
DS1390U-18+ 1.8 10 μSOP 1390 rr-18
DS1390U-3+ 3.0 10 μSOP 1390 rr-3
DS1390U-33+ 3.3 10 μSOP 1390 rr-33
DS1391U-18+ 1.8 10 μSOP 1391 rr-18
DS1391U-3+ 3.0 10 μSOP 1391 rr-3
DS1391U-33+ 3.3 10 μSOP 1391 rr-33
DS1392U-18+ 1.8 10 μSOP 1393 rr-18
DS1392U-3+ 3.0 10 μSOP 1392 rr-3
DS1392U-33+ 3.3 10 μSOP 1392 rr-33
DS1393U-18+ 1.8 10 μSOP 1393 rr-18
DS1393U-3+ 3.0 10 μSOP 1393 rr-3
DS1393U-33+ 3.3 10 μSOP 1393 rr-33
DS1394U-33+ 3.3 10 μSOP 1394 rr-33
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS(VCC= VCC(MIN)to VCC(MAX), TA= -40°C to +85°C, unless otherwise noted. Typical values are at nominal supply voltage and TA= +25°C,
unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCCPin Relative to Ground.....-0.3V to +6.0V
Voltage Range on Inputs Relative
to Ground...............................................-0.3V to (VCC+ 0.3V)
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature...........................Refer to the IPC/JEDEC
J-STD-020 Specification.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSDS139x-33 2.97 3.3 5.50
DS139x-3 2.7 3.0 3.3 Supply Voltage (Note 2) VCC
DS139x-18 1.71 1.8 1.89
Logic 1 VIH (Note 2) 0.7 x
VCC
VCC +
0.5V
Logic 0 VIL (Note 2) -0.3 +0.3 x
VCCV
Supply Voltage, Pullup
SQW/INT, SQW, INT, VCC = 0V VPU (Note 2) 5.5 V
-33 1.3 3.0 VCC(MAX)
-3 1.3 3.0 3.7 VBACKUP Voltage (Note 2) VBACKUP
-18 1.3 3.0 3.7
-33 2.70 2.88 2.97
-3 2.45 2.6 2.70 Power-Fail Voltage (Note 2) VPF
-18 1.51 1.6 1.71
R1 (Notes 3, 4) 250
R2 (Notes 3, 5) 2000 Trickle-Charge Current-Limiting
Resistors
R3 (Notes 3, 6) 4000
Input Leakage ILI (Note 7) -1 +1 μA
I/O Leakage ILO (Note 8) -1 +1 μA
RST Pin I/O Leakage ILORST (Note 9) -200 +10 μA
-33, -3 (VOH = 0.85 x VCC) -1 DOUT Logic 1 Output IOHDOUT-18 (VOH = 0.80 x VCC) 0.750 mA
-33, -3 (VOL = 0.15 x VCC) 3 DOUT Logic 0 Output IOHDOUT-18 (VOL = 0.20 x VCC) 2 mA
VCC > 1.71V; VOL = 0.4V 3.0 mA Logic 0 Output
(DS1390/DS1393/DS1394
SQW/INT; DS1392 SQW, INT;
DS1391/DS1393 RST)
IOLSIR
1.3V < VCC < 1.71V; VOL = 0.4V 250 μA
-33 2
-3 2 mA VCC Active Supply Current
(Note 10) ICCA
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
RECOMMENDED DC OPERATING CONDITIONS (continued)(VCC= VCC(MIN)to VCC(MAX), TA= -40°C to +85°C, unless otherwise noted. Typical values are at nominal supply voltage and TA= +25°C,
unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS-33 115 175
-3 80 125 VCC Standby Current
(Note 11) ICCS
-18 60 100
μA
VBACKUP Leakage Current
(VBACKUP = 3.7V,
VCC = VCC(MAX))
IBACKUPLKG 15 100 nA
DC ELECTRICAL CHARACTERISTICS(VCC= 0V, VBACKUP= 3.7V, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSVBACKUP Current OSC On,
SQW OffIBACKUP1(Note 12)5001000nA
VBACKUP Current OSC On,
SQW On (32kHz)IBACKUP2(Note 12)6001150nA
VBACKUP Current OSC On,
SQW On, VBACKUP = 3.0V,
TA = +25°C
IBACKUP3(Note 12)6001000nA
VBACKUP Current, OSC Off
(Data Retention)IBACKUPDR(Note 12)25100nA
AC ELECTRICAL CHARACTERISTICS—SPI INTERFACE(VCC= VCC(MIN)to VCC(MAX), TA= -40°C to +85°C,unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITS2.7V VCC 5.5V 0 4 SCLK Frequency (Note 13) fSCLK1.71V VCC1.89V 0 1 MHz
Data to SCLK Setup tDC (Notes 13, 14) 30 ns
SCLK to Data Hold tCDH (Notes 13, 14) 30 ns
2.7V VCC 5.5V 80 SCLK to Data Valid
(Notes 13, 14, 15) tCDD1.71V VCC 1.89V 160 ns
2.7V VCC 5.5V 110 SCLK Low Time (Note 13) tCL
1.71V VCC 1.89V 400
ns
2.7V VCC 5.5V 110 SCLK High Time (Note 13) tCH1.71V VCC 1.89V 400 ns
SCLK Rise and Fall tR, tF 200 ns
CS to SCLK Setup (Note 13) tCC 400 ns
SCLK to CS Hold (Note 13) tCCH 100 ns
2.7V VCC 5.5V 400 CS Inactive Time (Note 13) tCWH1.71V VCC 1.89V 500 ns
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle ChargerCPHA = 1
SCLK
tCC
tDCtF
tCDD
tCDZtCDH
tCL
tCH
DINW/RA6A0
WRITE ADDRESS BYTE
NOTE: SCLK CAN BE EITHER POLARITY SHOWN FOR CPOL = 1.DOUTD7
READ DATA BYTE
HIGH IMPEDANCE
Figure 1a. Timing Diagram—SPI Read Transfer (Mode 3)
CPHA = 0
SCLK
tCC
tDCtF
tCDDtCDZ
tCDH
tCL
tCH
DINW/RA6A0
WRITE ADDRESS BYTE
NOTE: SCLK CAN BE EITHER POLARITY SHOWN FOR CPOL = 0.DOUTD7
READ DATA BYTE
HIGH IMPEDANCE
Figure 1b. Timing Diagram—SPI Read Transfer (Mode 0)
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle ChargerCPHA = 1
SCLK
tCC
tDCtFtCCH
tCWH
tCDH
tCL
tCH
DINW/RA6A0D0
WRITE ADDRESS BYTE
NOTE: SCLK CAN BE EITHER POLARITY SHOWN FOR CPOL = 1.DOUT
READ DATA BYTE
HIGH IMPEDANCE
Figure 2a. Timing Diagram—SPI Write Transfer (Mode 3)
CPHA = 0
SCLK
tCC
tDCtFtCCH
tCWH
tCDH
tCL
tCH
DINW/RA6A0D0
WRITE ADDRESS BYTE
NOTE: SCLK CAN BE EITHER POLARITY SHOWN FOR CPOL = 0.DOUT
READ DATA BYTE
HIGH IMPEDANCE
Figure 2b. Timing Diagram—SPI Write Transfer (Mode 0)
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
AC ELECTRICAL CHARACTERISTICS—3-WIRE INTERFACE(VCC= VCC(MIN)to VCC(MAX), TA= -40°C to +85°C.) (Note 1) (Figures 3, 4)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITS2.7V VCC 5.5V 0 4 SCLK Frequency (Note 13) fSCLK1.71V VCC1.89V 0 1 MHz
Data to SCLK Setup tDC (Notes 13, 14) 30 ns
SCLK to Data Hold tCDH (Notes 13, 14) 30 ns
2.7V VCC 5.5V 80 SCLK to Data Valid (Notes 13,
14, 15) tCDD1.71V VCC 1.89V 160 ns
2.7V VCC 5.5V 110 SCLK Low Time (Note 13) tCL1.71V VCC 1.89V 400 ns
2.7V VCC 5.5V 110 SCLK High Time (Note 13) tCH1.71V VCC 1.89V 400 ns
SCLK Rise and Fall tR, tF 200 ns
CS to SCLK Setup tCC (Note 13) 400 ns
SCLK to CS Hold tCCH (Note 13) 100 ns
2.7V VCC 5.5V 400 CS Inactive Time (Note 13) tCWH1.71V VCC1.89V 500 ns
CS to Output High Impedance tCDZ (Note 13, 14) 40 ns
AC ELECTRICAL CHARACTERISTICS(VCC= VCC(MIN)to VCC(MAX), TA= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPushbutton DebouncePBDB160200ms
Reset Active TimetRST160200ms
Oscillator Stop Flag (OSF) DelaytOSF(Note 16)100ms
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle ChargertDC
tCL
tCHtCDH
tCC
tCDD
tCDZtFA1R/WD0D7
WRITE ADDRESS BYTEREAD DATA BYTE
SCLK
I/O
Figure 3. Timing Diagram—3-Wire Read Transfer
I/O
SCLK
tDC
tCL
tCHtCDH
tCCtCCH
tCWHtFA1R/WD0D7
WRITE ADDRESS BYTEWRITE DATA BYTE
Figure 4. Timing Diagram—3-Wire Write Transfer
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle ChargerOUTPUTS
VCC
VPF(MAX)
INPUTS
HIGH IMPEDANCE
RST
DON'T CARE
VALID
RECOGNIZEDRECOGNIZED
VALIDPF(MIN)
tRST
tRPUtF
VPFVPF
Figure 5. Power-Up/Down Timing
tRSTPBDB
RST
Figure 6. Pushbutton Reset Timing
POWER-UP/POWER-DOWN CHARACTERISTICS(TA= -40°C to +85°C) (Figures 5, 6)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSVCC Detect to Recognize Inputs
(VCC Rising)tRST(Note 17)160200ms
VCC Fall Time; VPF(MAX) to
VPF(MIN)tF300µs
VCC Rise Time; VPF(MIN) to
VPF(MAX)tR0µs
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
CAPACITANCE(TA= +25°C)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCapacitance on All Input PinsCIN10pF
Capacitance on All Output Pins
(High Impedance)CIO10pF
WARNING:Negative undershoots below -0.3V while the part is in battery-backed mode can cause loss of data.
Note 1:Limits at -40°C are guaranteed by design and not production tested.
Note 2:All voltages are referenced to ground.
Note 3:The use of the 250Ωtrickle-charge resistor is not allowed at VCC > 3.63V and should not be enabled. Use of the diode is
not recommended for VCC< 3.0V.
Note 4:Measured at VCC= typ, VBACKUP= 0V, register 0Fh = A5h.
Note 5:Measured at VCC= typ, VBACKUP= 0V, register 0Fh = A6h.
Note 6:Measured at VCC= typ, VBACKUP= 0V, register 0Fh = A7h.
Note 7:SCLK, DIN, CSon DS1390/DS1391/DS1394; SCLK, and CE on DS1392/DS1393.
Note 8:DOUT, SQW/INT(DS1390/DS1393/DS1394), SQW, and INT(DS1392).
Note 9:The RST pin has an internal 50kΩ(typ) pullup resistor to VCC.
Note 10: ICCA—SCLK clocking at max frequency = 4MHz for 3V and 3.3V versions; 1MHz for 1.8V version; RST (DS1391/DS1393)
inactive. Outputs are open.
Note 11:Specified with bus inactive.
Note 12:Measured with a 32.768kHz crystal attached to X1 and X2. Typical values measured at +25°C and 3.0VBACKUP.
Note 13:With 50pF load.
Note 14:Measured at VIH= 0.7 x VDDor VIL= 0.2 x VDD, 10ns rise/fall times.
Note 15:Measured at VOH= 0.7 x VDDor VOL= 0.2 x VDD. Measured from the 50% point of SCLK to the VOHminimum of SDO.
Note 16:The parameter tOSFis the time that the oscillator must be stopped for the OSF flag to be set over the voltage range of
0 ≤VCC≤VCC(MAX)and 1.3V ≤VBACKUP≤5.5V.
Note 17:This delay applies only if the oscillator is enabled and running. If the EOSCbit is 1, the startup time of the oscillator is
added to this delay.
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
Typical Operating Characteristics(VCC= +3.3V, TA= +25°C, unless otherwise noted.)
IBACKUP vs. VBACKUP, BBSQ1 = 0DS1390 TOC01
VBACKUP (V)
SUPPLY CURRENT (nA)
VCC= 0
IBACKUP vs. VBACKUP, BBSQ1 = 1DS1390 toc02
VBACKUP (V)
SUPPLY CURRENT (nA)
VCC = 0V
IBACKUP vs. TEMPERATURE
VBACKUP = 3.0VDS1390 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (nA)6040200-20
VCC = 0V
OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGEDS1390 toc04
SUPPLY (V)
FREQUENCY (Hz)
1.3
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
Pin Description
PIN
DS1390/
DS1394DS1391DS1392DS1393NAMEFUNCTION1 1 1 1 X1
2 2 2 2 X2
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator
circuitry is designed for operation with a crystal having a 6pF specified load
capacitance (CL). Pin X1 is the input to the oscillator and can optionally be
connected to an external 32.768kHz oscillator. The output of the internal
oscillator, pin X2, is floated if an external oscillator is connected to pin X1.
3 3 3 3 VBACKUP
DC Backup Power Input for Primary Cell. This pin is a rechargeable
battery/super cap or a secondary supply. UL recognized to ensure against
reverse charging current when used with a lithium battery (www.maxim-
ic.com/qa/info/w/). This pin must be grounded if not used. Diodes in series between the battery and the VBACKUP pin may prevent proper operation.
4 4 — — CS SPI Chip-Select Input. This pin is used to select or deselect the part. — 4 4 CE Chip Enable for 3-Wire Interface
5 5 5 5 GND Ground 6 — — DIN SPI Data Input. This pin is used to shift address and data into the part. — 6 — INT
Interrupt Output. This pin is used to output the interrupt signal, if enabled by
the control register. The maximum voltage on this pin is 5.5V, independent
of VCC or VBACKUP. If enabled, INT functions when the device is powered
by either VCC or VBACKUP.
— 9 — 6 RST
Reset. This active-low, open-drain output indicates the status of VCC relative
to the VPF specification. As Vcc falls below VPF, the RST pin is driven low.
When Vcc exceeds VPF, for tRST, the RST pin is driven high impedance.
This pin is combined with a debounced pushbutton input function. This pin
can be activated by a pushbutton reset request. This pin has an internal,
50k (typ) pullup resistor to VCC. No external pullup resistors should be
connected. If the crystal oscillator is disabled, the startup time of the
oscillator is added to the tRST delay.
7 7 — — DOUT SPI Data Output. Data is output on this pin when the part is in read mode.
CMOS push-pull driver. — 7 7 I/O Input/Output for 3-Wire Interface. CMOS push-pull driver.
8 8 8 8 SCLK Serial Clock Input. This pin is used to control the timing of data into and out
of the part.
9 — — 9 SQW/INT
Square-Wave/Interrupt Output. This pin is used to output the programmable
square wave or interrupt signal. When enabled by setting the ESQW bit to
logic 1, the SQW/INT pin outputs one of four frequencies: 32.768kHz,
8.192kHz, 4.096kHz, or 1Hz. This pin is open drain and requires an external
pullup resistor. The maximum voltage on this pin is 5.5V, independent of
VCC or VBACKUP. If enabled, SQW/INT functions when the device is powered
by either VCC or VBACKUP. If not used, this pin can be left open. — 9 — SQW
Square-Wave Output. This pin is open drain and requires an external pullup
resistor. The maximum voltage on this pin is 5.5V, independent of VCC or
VBACKUP. If enabled, SQW functions when the device is powered by either
VCC or VBACKUP. If not used, this pin can be left open.
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
Detailed DescriptionThe DS1390–DS1394 RTCs are low-power clocks/calen-
dars with alarms. Address and data are transferred seri-
ally through a 4-wire SPI interface for the DS1390 and
DS1391 and through a 3-wire interface for the DS1392,
DS1393, and DS1394. The DS1390/DS1391 operate as a
slave device on the SPI serial bus. The DS1392/DS1393
operate using a 3-wire synchronous serial bus. Access is
obtained by selecting the part by the CSpin (CE on
DS1392/DS1393) and clocking data into/out of the part
using the SCLK and DIN/DOUT pins (I/O on
DS1392/DS1393). Multiple-byte transfers are supported
within one CSlow period (see the SPI Serial-Data Bus
section). The clocks/calendars provide hundredths of
seconds, seconds, minutes, hours, day, date, month,
and year information. The alarm functions are performed
off all timekeeping registers, allowing the user to set high
resolution alarms. The date at the end of the month is
automatically adjusted for months with fewer than 31
days, including corrections for leap year. The clocks
operate in either the 24-hour or 12-hour format with an
AM/PM indicator. All five devices have a built-in tempera-
ture-compensated voltage reference that detects power
failures and automatically switches to the battery supply.
Additionally, the devices can provide trickle charging of
the backup voltage source, with selectable charging
resistance and diode voltage drops.
Functional DiagramBUS
INTERFACE
VCC LEVEL DETECT,
POWER SWITCH,
WRITE PROTECT,
TRICKLE CHARGER
(DS1390/91/94) DIN
(DS1390/91/94) DOUT
(DS1392/93) I/O
SCLK
VCC
GND
VBACKUP
(DS1390/91/94) CS
(DS1392/93) (CE)
SQUARE-WAVE RATE
SELECTOR, INT, MUX,
RST OUTPUT
HUNDREDTHS-OF-
SECONDS
GENERATOR
REAL-TIME CLOCK
WITH HUNDREDTHS
OF SECONDS
TRICKLE REGISTER
SQW/INT (DS1390/93/94)
CONTROL/STATUS
REGISTERS
ALARM REGISTERS
RST (DS1391)
SQW (DS1392)
DS1390/DS1391/
DS1392/DS1393/DS1394
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs withrickle Charger
Power ControlThe power-control function is provided by a precise,
temperature-compensated voltage reference and a
comparator circuit that monitors the VCClevel. The
device is fully accessible and data can be written and
read when VCCis greater than VPF. However, when
VCCfalls below VPF, the internal clock registers are
blocked from any access. If VPFis less than VBACKUP,
the device power is switched from VCCto VBACKUP
when VCCdrops below VPF. If VPFis greater than
VBACKUP, the device power is switched from VCCto
VBACKUPwhen VCCdrops below VBACKUP.
Timekeeping operation and register data are main-
tained from the VBACKUPsource until VCCis returned to
nominal levels (Table 1). After VCCreturns above VPF,
read and write access is allowed after RSTgoes high
(Figure 5).
Oscillator CircuitAll five devices use an external 32.768kHz crystal. The
oscillator circuit does not require any external resistors
or capacitors to operate. Table 2 specifies several crys-
tal parameters for the external crystal. If a crystal is
used with the specified characteristics, the startup time
is usually less than one second.
Clock AccuracyThe accuracy of the clock is dependent upon the accu-
racy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and
the capacitive load for which the crystal was trimmed.
Additional error is added by crystal frequency drift
caused by temperature shifts. External circuit noise
coupled into the oscillator circuit can result in the clock
running fast. Figure 7 shows a typical PC board layout
for isolation of the crystal and oscillator from noise.
Refer to Application Note 58:Crystal Considerations
with Maxim Real-Time Clocksfor detailed information.
PARAMETERSYMBOLMINTYPMAXUNITSNominal FrequencyfO32.768kHz
Series ResistanceESR55kΩ
Load CapacitanceCL6pF
Table 2. Crystal Specifications**The crystal, traces, and crystal input pins should be isolated
from RF generating signals. Refer to Application Note 58:
Crystal Considerations for Maxim Real-Time Clocksfor addi-
tional specifications.
SUPPLY
CONDITION
READ/WRITE
ACCESS) POWERED BY VCC < VPF,
VCC < VBACKUPNo VBACKUP
VCC < VPF,
VCC > VBACKUPNo VCC
VCC > VPF,
VCC < VBACKUPYes VCC
VCC > VPF,
VCC > VBACKUPYes VCC
Table 1. Power ControlLOCAL GROUND PLANE (LAYER 2)
CRYSTAL
GND
NOTE: AVOID ROUTING SIGNAL LINES IN THE CROSSHATCHED AREA
(UPPER LEFT QUADRANT) OF
THE PACKAGE UNLESS THERE IS
A GROUND PLANE BETWEEN THE
SIGNAL LINE AND THE DEVICE PACKAGE.
