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DS1337SDALLASN/a12000avaiSerial real-time clock
DS1337UDALLASN/a27950avaiSerial real-time clock
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DS1337UDSN/a101avaiSerial real-time clock


DS1337U ,Serial real-time clockFEATURES The DS1337 serial real-time clock is a low-power  Real-Time Clock (RTC) Counts Seconds, ..
DS1337U ,Serial real-time clockELECTRICAL CHARACTERISTICS (V = 1.3V to 1.8V, T = -40°C to +85°C.) CC APARAMETER SYMBOL CONDITIONS ..
DS1337U ,Serial real-time clockAPPLICATIONS DS1337 -40°C to +85°C 8 DIP (300mil) DS1337 Handhelds (GPS, POS Terminal, MP3 Player) ..
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DS1338C-3 ,I2C RTC with 56-Byte NV RAMELECTRICAL CHARACTERISTICS (V = 0V, T = -40°C to +85°C.) (Note 1) CC A PARAMETER SYMBOL MIN TYP MAX ..
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DS1337S-DS1337U
Serial real-time clock
GENERAL DESCRIPTION
The DS1337 serial real-time clock is a low-power
clock/calendar with two programmable time-of-day
alarms and a programmable square-wave output. Address and data are transferred serially via a 2-wire,
bidirectional bus. The clock/calendar provides seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is
automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock
operates in either the 24-hour or 12-hour format with
AM/PM indicator.
APPLICATIONS

Handhelds (GPS, POS Terminal, MP3 Player) Consumer Electronics (Set-Top Box, VCR/Digital
Recording) Office Equipment (Fax/Printer, Copier)
Medical (Glucometer, Medicine Dispenser)
Telecommunications (Router, Switcher, Server) Other (Utility Meter, Vending Machine, Thermostat,
Modem)
FEATURES
Real-Time Clock (RTC) Counts Seconds,
Minutes, Hours, Day, Date, Month, and Year
with Leap-Year Compensation Valid Up to 2100 Two-Wire Serial Interface Two Time-of-Day Alarms Oscillator Stop Flag Programmable Square-Wave Output
– Defaults to 32kHz on Power-Up
��Available in 8-Pin DIP, SO, or �SOP
ORDERING INFORMATION

PIN CONFIGURATIONS

DS1337
Serial Real-Time Clock

TYPICAL OPERATING CIRCUIT
DS1337
ABSOLUTE MAXIMUM RATINGS

Voltage Range on Any Pin Relative to Ground -0.3V to +6.0VOperating Temperature Range -40°C to +85°C
Storage Temperature Range -55°C to +125°CSoldering Temperature Range See IPC/JEDEC J-STD-020A Specification
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
RECOMMENDED DC OPERATING CONDITIONS

(TA = -40°C to +85°C)
DC ELECTRICAL CHARACTERISTICS

(VCC = 1.8V to 4.0V, TA = -40°C to +85°C.)
DC ELECTRICAL CHARACTERISTICS

(VCC = 1.3V to 1.8V, TA = -40°C to +85°C.)
CRYSTAL SPECIFICATIONS*

*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to Application Note 58: Crystal Considerations
for Dallas Real-Time Clocks for additional specifications.
DS1337
AC ELECTRICAL CHARACTERISTICS

(VCC = 1.8V to 4.0V, TA = -40°C to +85°C.) Note 1: SCL only.
Note 2: SDA, INTA, and SQW/INTB.
Note 3: ICCA—SCL clocking at max frequency = 400kHz, VIL = 0.0V, VIH = VCC.
Note 4: Specified with 2-wire bus inactive, VIL = 0.0V, VIH = VCC.
Note 5: SQW enabled.
Note 6: Specified with the SQW function disabled by setting INTCN = 1.
Note 7: Using recommended crystal on X1 and X2.
Note 8: After this period, the first clock pulse is generated.
Note 9: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL signal) in order to

bridge the undefined region of the falling edge of SCL.
Note 10: The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 11: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT � to 250ns
must then be met. This is
automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line tR max + tSU:DAT = 1000 + 250 = 1250ns before the SCL line is
released.
Note 12: CB—total capacitance of one bus line in pF.
DS1337TYPICAL OPERATING CHARACTERISTICS
(VCC = 3.3V, TA = +25∞C, unless otherwise noted.)
OSCILLATOR FREQUENCY vs. VCC

DS1337 toc05
FREQUENCY (Hz)
ICCA vs. VCC
(SQUARE-WAVE ON)
DS1337 toc04
VCC (V)
SUPPLY CURRENT (
IOSC VS. TEMPERATURE(SQUARE-WAVE OFF)
DS1337 toc03
TEMPERATURE (C)
SUPPLY CURRENT (nA)6040200-20
DS1337 toc02
IOSC VS. VCC
(SQUARE-WAVE ON)
VBAT (V)
SUPPLY CURRENT (nA)
IOSC VS. VCC
(SQUARE-WAVE OFF)
DS1337 toc01
VBAT (V)
SUPPLY CURRENT (nA)
1.3
DS1337
PIN DESCRIPTION

DS1337
Figure 2. Timing Diagram
OPERATION
The block diagram in Figure 3 shows the main elements of the DS1337. As shown, communications to
and from the DS1337 occur serially over a 2-wire, bidirectional bus. The DS1337 operates as a slave
device on the serial bus. Access is obtained by implementing a START condition and providing a device
identification code, followed by data. Subsequent registers can be accessed sequentially until a STOP
condition is executed.
Figure 3. Block Diagram
DS1337
CLOCK ACCURACY

The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Crystal frequency drift caused by temperature shifts creates additional error. External circuit
noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application Note 58:
Crystal Considerations with Dallas Real-Time Clocks for detailed information.
ADDRESS MAP

The address map for the registers of the DS1337 is shown in Table 1. During a multibyte access, when
the address pointer reaches the end of the register space (0Fh) it wraps around to location 00h. On a 2-
wire START, STOP, or address pointer incrementing to location 00h, the current time is transferred to a
second set of registers. The time information is read from these secondary registers, while the clock may
continue to run. This eliminates the need to re-read the registers in case of an update of the main registers
during a read.
Table 1. Timekeeper Registers Note: Unless otherwise specified, the state of the registers is not defined when power is first applied or VCC falls below the VOSC.
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