IC Phoenix
 
Home ›  DD24 > DS1337+-DS1337C-DS1337C#-DS1337S+-DS1337S+T&R-DS1337U+,I²C Serial Real-Time Clock
DS1337+-DS1337C-DS1337C#-DS1337S+-DS1337S+T&R Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
DS1337+MAXIMN/a994avaiI²C Serial Real-Time Clock
DS1337CMAXIMN/a500avaiI²C Serial Real-Time Clock
DS1337C# |DS1337CDALLASN/a8651avaiI²C Serial Real-Time Clock
DS1337S+ |DS1337SMAXIMN/a300avaiI²C Serial Real-Time Clock
DS1337S+T&R |DS1337ST&RDALLAS N/a7500avaiI²C Serial Real-Time Clock
DS1337U+ |DS1337UDALLASN/a537avaiI²C Serial Real-Time Clock


DS1337C# ,I²C Serial Real-Time ClockFEATURES The DS1337 serial real-time clock is a low-power • Completely Manages All Timekeeping cloc ..
DS1337S ,Serial real-time clockFEATURES The DS1337 serial real-time clock is a low-power  Real-Time Clock (RTC) Counts Seconds, ..
DS1337S+ ,I²C Serial Real-Time ClockELECTRICAL CHARACTERISTICS--Timekeeping (V = 1.3V to 1.8V, T = -40°C to +85°C.) (Note 1) CC APARAME ..
DS1337S+T&R ,I²C Serial Real-Time ClockELECTRICAL CHARACTERISTICS--Timekeeping (V = 1.3V to 1.8V, T = -40°C to +85°C.) (Note 1) CC APARAME ..
DS1337U ,Serial real-time clockELECTRICAL CHARACTERISTICS (V = 1.3V to 1.8V, T = -40°C to +85°C.) CC APARAMETER SYMBOL CONDITIONS ..
DS1337U ,Serial real-time clockFEATURES The DS1337 serial real-time clock is a low-power  Real-Time Clock (RTC) Counts Seconds, ..
DTC124EM , NPN 100mA 50V Digital Transistors (Bias Resistor Built-in Transistors)
DTC124ES , DTA/DTC SERIES
DTC124-ES , DTA/DTC SERIES
DTC124ESA , Digital transistors (built-in resistors)
DTC124GKA , 100mA / 50V Digital transistors (with built-in resistors)
DTC124GKA , 100mA / 50V Digital transistors (with built-in resistors)


DS1337+-DS1337C-DS1337C#-DS1337S+-DS1337S+T&R-DS1337U+
I²C Serial Real-Time Clock
GENERAL DESCRIPTION
The DS1337 serial real-time clock is a low-power
clock/calendar with two programmable time-of-day
alarms and a programmable square-wave output.
Address and data are transferred serially through an 2C bus. The clock/calendar provides seconds,
minutes, hours, day, date, month, and year
information. The date at the end of the month is
automatically adjusted for months with fewer than 31
days, including corrections for leap year. The clock
operates in either the 24-hour or 12-hour format with
AM/PM indicator.
The device is fully accessible through the serial
interface while VCC is between 1.8V and 5.5V. I2C
operation is not guaranteed below 1.8V.
Timekeeping operation is maintained with VCC as low
as 1.3V.
APPLICATIONS

Handhelds (GPS, POS Terminal, MP3 Player)
Consumer Electronics (Set-Top Box, VCR/Digital
Recording)
Office Equipment (Fax/Printer, Copier)
Medical (Glucometer, Medicine Dispenser)
Telecommunications (Router, Switch, Server)
Other (Utility Meter, Vending Machine, Thermostat,
Modem)
TYPICAL OPERATING CIRCUIT
BENEFITS AND FEATURES
Completely Manages All Timekeeping
Functions
Real-Time Clock (RTC) Counts Seconds,
Minutes, Hours, Day, Date, Month, and
Year with Leap-Year Compensation Valid
Up to 2100
Two Time-of-Day Alarms Programmable Square-Wave Output
Defaults to 32kHz on Power-Up
Oscillator Stop Flag Interfaces with Most Microcontrollers I2C Serial Interface Surface-Mount Package with an Integrated
Crystal (DC1337C) Saves Additional Space
and Simplifies Design
-40°C to +85°C Industrial Temperature Range
Supports Operation in a Wide Range of
Applications

ORDERING INFORMATION
PART TEMP RANGE PIN-PACKAGE TOP
MARK†

DS1337+ -40°C to +85°C 8 DIP (300 mils) DS1337
DS1337S+ -40°C to +85°C 8 SO (150 mils) DS1337
DS1337U+ -40°C to +85°C 8 µSOP 1337
DS1337C# -40°C to +85°C 16 SO (300 mils) DS1337C
+ Denotes a lead(Pb)-free/RoHS-compliant device.
# Denotes a RoHS-compliant device that may include lead that is
exempt under the RoHS requirements. The lead finish is JESD97
category e3, and is compatible with both lead-based and lead-free
soldering processes.
† A “+” anywhere on the top mark denotes a lead-free device. A
“#” denotes a RoHS-compliant device.
Pin Configurations appear at end of data sheet.
DS1337 2C Serial Real-Time Clock
DS1337 I2C Serial Real-Time Clock
ABSOLUTE MAXIMUM RATINGS

Voltage Range on Any Pin Relative to Ground…………………………………………………………...…-0.3V to +6.0V
Operating Temperature Range (Noncondensing)………………………………………………………….-40°C to +85°C
Storage Temperature Range………………………………………………………………………………..-55°C to +125°C
Soldering Temperature…………………………………………………………See IPC/JEDEC J-STD-020 Specification
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS

(TA = -40°C to +85°C)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

VCC Supply Voltage
VCC Full operation 1.8 3.3 5.5 V
VCCT Timekeeping (Note
5) 1.3 1.8 V
Logic 1 VIH
SCL, SDA 0.7 x VCC VCC + 0.3 INTA, SQW/INTB 5.5
Logic 0 VIL -0.3 +0.3 x VCC V
DC ELECTRICAL CHARACTERISTICS—Full Operation

(VCC = 1.8V to 5.5V, TA = -40°C to +85°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Input Leakage ILI (Note 2) -1 +1 µA
I/O Leakage ILO (Note 3) -1 +1 µA
Logic 0 Output (VOL = 0.4V) IOL (Note 3) 3 mA
Active Supply Current ICCA (Note 4) 150 µA
Standby Current ICCS (Notes 5, 6) 1.5 µA
DC ELECTRICAL CHARACTERISTICS--Timekeeping

(VCC = 1.3V to 1.8V, TA = -40°C to +85°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Timekeeping Current
(Oscillator Enabled) ICCTOSC (Notes 5, 7, 8, 9) 425 600 nA
Data-Retention Current
(Oscillator Disabled) ICCTDDR (Notes 5, 9) 100 nA
DS1337 I2C Serial Real-Time Clock
AC ELECTRICAL CHARACTERISTICS

(VCC = 1.8V to 5.5V, TA = -40°C to +85°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SCL Clock Frequency fSCL Fast mode 100 400 kHz Standard mode 0 100
Bus Free Time Between a
STOP and START Condition tBUF Fast mode 1.3 µs Standard mode 4.7
Hold Time (Repeated)
START Condition (Note 10) tHD:STA Fast mode 0.6 µs Standard mode 4.0
LOW Period of SCL Clock tLOW Fast mode 1.3 µs Standard mode 4.7
HIGH Period of SCL Clock tHIGH Fast mode 0.6 µs Standard mode 4.0
Setup Time for a Repeated
START Condition tSU:STA Fast mode 0.6 µs Standard mode 4.7
Data Hold Time
(Notes 11, 12) tHD:DAT Fast mode 0 0.9 µs Standard mode 0
Data Setup Time (Note 13) tSU:DAT Fast mode 100 ns Standard mode 250
Rise Time of Both SDA and
SCL Signals (Note 14) tR Fast mode 20 + 0.1CB 300 ns Standard mode 20 + 0.1CB 1000
Fall Time of Both SDA and
SCL Signals (Note 14) tF Fast mode 20 + 0.1CB 300 ns Standard mode 20 + 0.1CB 300
Setup Time for STOP
Condition tSU:STO Fast mode 0.6 µs Standard mode 4.0
Capacitive Load for Each Bus
Line CB (Note 14) 400 pF
I/O Capacitance (SDA, SCL) CI/O (Note 15) 10 pF
Oscillator Stop Flag (OSF)
Delay tOSF 100 ms
Note 1:
Limits at -40°C are guaranteed by design and are not production tested.
Note 2:
SCL only.
Note 3:
SDA, INTA, and SQW/INTB.
Note 4:
ICCA—SCL clocking at max frequency = 400kHz, VIL = 0.0V, VIH = VCC.
Note 5:
Specified with the I2C bus inactive, VIL = 0.0V, VIH = VCC.
Note 6:
SQW enabled.
Note 7:
Specified with the SQW function disabled by setting INTCN = 1.
Note 8:
Using recommended crystal on X1 and X2.
Note 9:
The device is fully accessible when 1.8 ≤ VCC ≤ 5.5V. Time and date are maintained when 1.3V ≤ VCC ≤ 1.8V.
Note 10:
After this period, the first clock pulse is generated
Note 11:
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 12:
The maximum tHD:DAT need only be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 13:
A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT ≥ to 250ns must then be met. This is
automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line tR max + tSU:DAT = 1000 + 250 = 1250ns before the SCL
line is released.
Note 14:
CB—total capacitance of one bus line in pF.
DS1337 I2C Serial Real-Time Clock
Note 16:
The parameter tOSF is the period of time that the oscillator must be stopped for the OSF bit to be set over the
voltage range of VCC(MIN) ≤ VCC ≤ VCC(MAX)..
TYPICAL OPERATING CHARACTERISTICS

(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
ICCA vs. VCC

VCC (V)
(u
ICC vs. VCC

1.31.82.32.83.33.84.34.85.3VCC (V)
ICC
(n
INTCN = 0
(Squarewave on)
INTCN = 1
(Squarewave off)
ICCTOSCICCS
ICCS vs. Temperature

-40.0-20.00.020.040.060.080.0VCC (V)
C (n
INTCN = 0
(Squarewave on)
VCC = 3.0V
INTCN = 1
(Squarewave off)
OSCILLATOR FREQUENCY vs. VCC

1.31.82.32.83.33.84.34.8VCC (V)
NCY
DS1337 I2C Serial Real-Time Clock
PIN DESCRIPTION
PIN NAME FUNCTION 8 16
— X1
Connections for a Standard 32.768kHz Quartz Crystal. The internal
oscillator circuitry is designed for operation with a crystal having a specified
load capacitance (CL) of 6pF. For more information about crystal selection
and crystal layout considerations, refer to Application Note 58: Crystal
Considerations with Dallas Real-Time Clocks. An external 32.768kHz
oscillator can also drive the DS1337. In this configuration, the X1 pin is
connected to the external oscillator signal and the X2 pin is floated. — X2 14 INTA
Interrupt Output. When enabled, INTA is asserted low when the
time/day/date matches the values set in the alarm registers. This pin is an
open-drain output and requires an external pullup resistor. The pull up
voltage may be up to 5.5V, regardless of the voltage on VCC. If not used, this pin
may be left floating. 15 GND Ground. DC power is provided to the device on this pin. 16 SDA
Serial Data Input/Output. SDA is the input/output pin for the I2C serial
interface. The SDA pin is open-drain output and requires an external pullup
resistor. 1 SCL Serial Clock Input. SCL is used to synchronize data movement on the serial
interface. 2 SQW/INTB
Square-Wave/Interrupt Output. Programmable square-wave or interrupt
output signal. It is an open-drain output and requires an external pullup
resistor. The pull up voltage may be up to 5.5V, regardless of the voltage on VCC.
If not used, this pin may be left floating. 3 VCC DC Power. DC power is provided to the device on this pin. 4–13 N.C. No Connect. These pins are not connected internally, but must be
grounded for proper operation.
TIMING DIAGRAM
DS1337 I2C Serial Real-Time Clock
BLOCK DIAGRAM

DETAILED DESCRIPTION

The Block Diagram shows the main elements of the DS1337. As shown, communications to and from the DS1337
occur serially over an I2C bus. The DS1337 operates as a slave device on the serial bus. Access is obtained by
implementing a START condition and providing a device identification code, followed by data. Subsequent
registers can be accessed sequentially until a STOP condition is executed. The device is fully accessible through
the I2C interface whenever VCC is between 5.5V and 1.8V. I2C operation is not guaranteed when VCC is below 1.8V.
The DS1337 maintains the time and date when VCC is as low as 1.3V.
OSCILLATOR CIRCUIT

The DS1337 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or
capacitors to operate. Table 1 specifies several crystal parameters for the external crystal. The Block Diagram
shows a functional schematic of the oscillator circuit. The startup time is usually less than 1 second when using a
crystal with the specified characteristics.
Table 1. Crystal Specifications*
PARAMETER SYMBOL MIN TYP MAX UNITS

Nominal Frequency fO 32.768 kHz
Series Resistance ESR 50 kΩ
Load Capacitance CL 6 pF
*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.
DS1337 I2C Serial Real-Time Clock
CLOCK ACCURACY

The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between
the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Crystal
frequency drift caused by temperature shifts creates additional error. External circuit noise coupled into the
oscillator circuit can result in the clock running fast. Figure 1 shows a typical PC board layout for isolating the
crystal and oscillator from noise. Refer to Application Note 58: Crystal Considerations with Dallas Real-Time
Clocks for detailed information.
Figure 1. Typical PC Board Layout for Crystal

DS1337C ONLY

The DS1337C integrates a standard 32,768Hz crystal in the package. Typical accuracy at nominal VCC and +25°C
is approximately +10ppm. Refer to Application Note 58 for information about crystal accuracy vs. temperature.
OPERATING MODES

The amount of current consumed by the DS1337 is determined, in part, by the IC interface and oscillator
operation. The following table shows the relationship between the operating mode and the corresponding ICC
parameter.
Operating Mode VCC Power
2C Interface Active 1.8V ≤ VCC ≤ 5.5V ICC Active (ICCA) 2C Interface Inactive 1.8V ≤ VCC ≤ 5.5V ICC Standby (ICCS) 2C Interface Inactive 1.3V ≤ VCC ≤ 1.8V Timekeeping (ICCTOSC) 2C Interface Inactive
Oscillator Disabled 1.3V ≤ VCC ≤ 1.8V
Data Retention
(ICCTDDR)
LOCAL GROUND PLANE (LAYER 2)
CRYSTAL
X1
X2
GND
NOTE:
AVOID ROUTING SIGNALS IN THE CROSSHATCHED
AREA (UPPER LEFT-HAND QUADRANT) OF THE PACKAGE
UNLESS THERE IS A GROUND PLANE BETWEEN THE SIGNAL
LINE AND THE PACKAGE.
DS1337 I2C Serial Real-Time Clock
ADDRESS MAP

Table 2 shows the address map for the DS1337 registers. During a multibyte access, when the address pointer
reaches the end of the register space (0Fh) it wraps around to location 00h. On an I2C START, STOP, or address
pointer incrementing to location 00h, the current time is transferred to a second set of registers. The time
information is read from these secondary registers, while the clock may continue to run. This eliminates the need
to re-read the registers in case of an update of the main registers during a read.
Table 2. Timekeeper Registers
ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 FUNCTION RANGE

00H 0 10 Seconds Seconds Seconds 00–59
01H 0 10 Minutes Minutes Minutes 00–59
02H 0 12/24 AM/PM 10 Hour Hour Hours
1–12
+AM/PM
00–23 10 Hour
03H 0 0 0 0 0 Day Day 1–7
04H 0 0 10 Date Date Date 01–31
05H Century 0 0 10 Month Month Month/
Century
01–12 +
Century
06H 10 Year Year Year 00–99
07H A1M1 10 Seconds Seconds Alarm 1
Seconds 00–59
08H A1M2 10 Minutes Minutes Alarm 1
Minutes 00–59
09H A1M3 12/24 AM/PM 10 Hour Hour Alarm 1
Hours
1–12 +
AM/PM
00–23 10 Hour
0AH A1M4 DY/DT 10 Date
Day Alarm 1
Day 1–7
Date Alarm 1
Date 01–31
0BH A2M2 10 Minutes Minutes Alarm 2
Minutes 00–59
0CH A2M3 12/24 AM/PM 10 Hour Hour Alarm 2
Hours
1–12 +
AM/PM
00–23 10 Hour
0DH A2M4 DY/DT 10 Date
Day Alarm 2
Day 1–7
Date Alarm 2
Date 01–31
0EH EOSC 0 0 RS2 RS1 INTCN A2IE A1IE Control —
0FH OSF 0 0 0 0 0 A2F A1F Status —
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied or VCC falls below the VOSC.
2C INTERFACE
The I2C interface is accessible whenever VCC is at a valid level. If a microcontroller connected to the DS1337 resets
while reading from the DS1337 during an I2C read, the two could become unsynchronized. The microcontroller must
terminate the last byte read with a Not-Acknowledge (NACK) to properly terminate the read. When the microcontroller
resets, the DS1337 I2C interface may be placed into a known state by toggling SCL until SDA is observed to be at a
high level. At that point the microcontroller should pull SDA low while SCL is high, generating a START condition.
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED