DS1330WP-100+ ,3.3V 256k Nonvolatile SRAM with Battery Monitor19-5590; Rev 10/10 DS1330W 3.3V 256k Nonvolatile SRAM with Battery Monitor
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DS1336S ,Afterburner ChipPIN DESCRIPTIONV /IN1 - +5V Input and Input 1CCIN2 - IN5 - Inputs 2 - 5OUT1 - 5 - Outputs 1 - 5V - ..
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DTC124EK , DTA/DTC SERIES
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DS1330WP-100-DS1330WP-100+
3.3V 256k Nonvolatile SRAM with Battery Monitor
FEATURES 10 years minimum data retention in the
absence of external power Data is automatically protected during power
loss Power supply monitor resets processor when
VCC power loss occurs and holds processor in
reset during VCC ramp-up Battery monitor checks remaining capacity
daily Read and write access times of 100 ns Unlimited write cycle endurance Typical standby current 50 μA Upgrade for 32k x 8 SRAM, EEPROM or
Flash Lithium battery is electrically disconnected to
retain freshness until power is applied for the
first time Optional industrial temperature range of
-40°C to +85°C, designated IND PowerCap Module (PCM) package − Directly surface-mountable module − Replaceable snap-on PowerCap provides
lithium backup battery − Standardized pinout for all nonvolatile
SRAM products − Detachment feature on PowerCap allows
easy removal using a regular screwdriver
PIN ASSIGNMENT
PIN DESCRIPTION A0-A14 - Address Inputs
DQ0-DQ7 - Data In/Data Out - Chip Enable - Write Enable - Output Enable
RST - Reset Output - Battery Warning Output
VCC - Power (+3.3V)
GND - Ground
NC - No Connect
DESCRIPTION The DS1330W 3.3V 256k Nonvolatile SRAM is a 262,144-bit, fully static, nonvolatile SRAM organized
as 32,768 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control
circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs,
the lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. Additionally, the DS1330W has dedicated circuitry for monitoring the status of
VCC and the status of the internal lithium battery. DS1330W devices in the PowerCap Module package
are directly surface mountable and are normally paired with a DS9034PC PowerCap to form a complete
Nonvolatile SRAM module. The devices can be used in place of 32k x 8 SRAM, EEPROM or Flash
components.
DS1330W
3.3V 256k Nonvolatile SRAM
with Battery Monitor
10
11
12
13
14
15
16
17
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
BW
NC
NC
RST
VCC
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
NC
NC
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
GND VBAT
34-Pin PowerCap Module (PCM)
(Uses DS9034PC+ or DS9034PCI+ PowerCap)
19-5590; Rev 10/10
DS1330W
READ MODE The DS1330W executes a read cycle whenever WE (Write Enable) is inactive (high) and CE(Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 15 address inputs
(A0 - A14) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later-occurring signal (CE or OE) and the limiting
parameter is either tCO for CE or tOE for OE rather than address access.
WRITE MODE The DS1330W executes a write cycle whenever the WE and CE signals are in the active (low) state after
address inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the
write cycle. The write cycle is terminated by the earlier rising edge of CE or WE. All address inputs must
be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time
(tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during
write cycles to avoid bus contention. However, if the output drivers are enabled (CE and OE active) then will disable the outputs in tODW from its falling edge.
DATA RETENTION MODE The DS1330W provides full-functional capability for VCC greater than 3.0 volts and write protects by 2.8
volts. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile
static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically
write protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As VCC
falls below approximately 2.5 volts, the power switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when VCC rises above approximately 2.5 volts, the power
switching circuit connects external VCC to the RAM and disconnects the lithium energy source. Normal
RAM operation can resume after VCC exceeds 3.0 volts.
SYSTEM POWER MONITORING The DS1330W has the ability to monitor the external VCC power supply. When an out-of-tolerance power
supply condition is detected, the NV SRAM warns a processor-based system of impending power failure
by asserting RST. On power-up, RST is held active for 200ms nominally to prevent system operation
during power-on transients and to allow tREC to elapse. RST has an open-drain output driver.
BATTERY MONITORING The DS1330W automatically performs periodic battery voltage monitoring on a 24-hour time interval.
Such monitoring begins within tREC after VCC rises above VTP and is suspended when power failure
occurs.
After each 24-hour period has elapsed, the battery is connected to an internal 1MΩ test resistor for 1
second. During this 1 second, if battery voltage falls below the battery voltage trip point (2.6V), the
battery warning output BW is asserted. Once asserted, BW remains active until the module is replaced.
The battery is still re-tested after each VCC power-up, however, even if BW is active. If the battery
voltage is found to be higher than 2.6V during such testing, BW is de-asserted and regular 24-hour testing
resumes. BW has an open-drain output driver.
DS1330W
FRESHNESS SEAL Each DS1330W is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level greater than VTP, the lithium
energy source is enabled for battery backup operation.
PACKAGES The 34-pin PowerCap Module integrates SRAM memory and nonvolatile control into a module base
along with contacts for connection to the lithium battery in the DS9034PC PowerCap. The PowerCap
Module package design allows a DS1330W device to be surface mounted without subjecting its lithium
backup battery to destructive high-temperature reflow soldering. After a DS1330W module base is reflow
soldered, a DS9034PC is snapped on top of the base to form a complete Nonvolatile SRAM module. The
DS9034PC is keyed to prevent improper attachment. DS1330W module bases and DS9034PC
PowerCaps are ordered separately and shipped in separate containers. See the DS9034PC data sheet for
further information.
DS1330W
ABSOLUTE MAXIMUM RATINGS Voltage on Any Pin Relative to Ground -0.3V to +4.6V
Operating Temperature Range
Commercial: 0°C to +70°C
Industrial: -40°C to +85°C
Storage Temperature Range -55°C to +125°C
Lead Temperature (soldering, 10s) +260°C
Soldering Temperature (reflow) +260°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (TA: See Note 10)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Power Supply Voltage VCC 3.0 3.3 3.6 V
Logic 1 VIH 2.2 VCC V
Logic 0 VIL 0.0 0.4 V
DC ELECTRICAL CHARACTERISTICS (TA: See Note 10) (VCC=3.3V ±0.3V)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Leakage Current IIL -1.0 +1.0 μA
I/O Leakage Current CE ≥
VIH ≤ VCC IIO -1.0 +1.0 μA
Output Current @ 2.2V IOH -1.0 mA 14
Output Current @ 0.4V IOL 2.0 mA 14
Standby Current CE = 2.2V ICCS1 50 250 μA
Standby Current CE = VCC -
0.2V ICCS2 30 150 μA
Operating Current ICCO1 50 mA
Write Protection Voltage VTP 2.8 2.9 3.0 V
CAPACITANCE (TA= +25°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Capacitance CIN 5 10 pF
Input/Output Capacitance CI/O 5 10 pF
DS1330W
AC ELECTRICAL CHARACTERISTICS (TA: See Note 10) (VCC =3.3V ±0.3V)
PARAMETER SYMBOL
DS1330W-100
UNITS NOTES
MIN MAX Read Cycle Time tRC 100 ns
Access Time tACC 100 ns to Output Valid tOE 50 ns to Output Valid tCO 100 ns or CE to Output Active tCOE 5 ns 5
Output High Z from
Deselection tOD 35 ns 5
Output Hold from Address
Change tOH 5 ns
Write Cycle Time tWC 100 ns
Write Pulse Width tWP 75 ns 3
Address Setup Time tAW 0 ns
Write Recovery Time tWR1
tWR2
20 ns 12
13
Output High Z from WE tODW 35 ns 5
Output Active from WE tOEW 5 ns 5
Data Setup Time tDS 40 ns 4
Data Hold Time tDH1
tDH2
20 ns 12
13
READ CYCLE DS1330W
WRITE CYCLE 1
WRITE CYCLE 2
