DS1243Y-120 ,64K NV SRAM with Phantom ClockFEATURES§ Real time clock keeps track of hundredths ofV1 28 CCRSTseconds, seconds, minutes, hours, ..
DS1243Y-120 ,64K NV SRAM with Phantom ClockDS1243Y64K NV SRAM with Phantom Clockwww.dalsemi.comPIN ASSIGNMENT
DS1243Y-120 ,64K NV SRAM with Phantom ClockFEATURES§ Real time clock keeps track of hundredths ofV1 28 CCRSTseconds, seconds, minutes, hours, ..
DS1243Y-120+ ,64K NV SRAM with Phantom ClockFEATURES PIN CONFIGURATION Real-Time Clock Keeps Track of Hundredths TOP VIEW of Seconds, Secon ..
DS1243Y-150 ,64K NV SRAM with Phantom ClockDS1243Y64K NV SRAM with Phantom Clockwww.dalsemi.comPIN ASSIGNMENT
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DS1243Y-120-DS1243Y-150
64K NV SRAM with Phantom Clock
FEATURES Real time clock keeps track of hundredths ofseconds, seconds, minutes, hours, days, date
of the month, months, and years 8K x 8 NV SRAM directly replaces volatile
static RAM or EEPROM Embedded lithium energy cell maintains
calendar operation and retains RAM data§ Watch function is transparent to RAM
operation Month and year determine the number of days
in each month; valid up to 2100§ Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time Standard 28–pin JEDEC pinout Full ±10% operating range Operating temperature range 0°C to 70°C§ Accuracy is better than ±1 minute/month @
25°C Over 10 years of data retention in the absence
of power§ Available in 120, 150 and 200 ns access time
ORDERING INFORMATIONDS1243Y–XXX
–120 120 ns access
–150 150 ns access
DS1243Y200 ns access
PIN ASSIGNMENT
PIN DESCRIPTIONA0–A12 – Address Inputs– Chip Enable
GND – Ground
DQ0–DQ7 – Data In/Data Out
VCC – Power (+5V)– Write Enable – Output Enable
NC – No Connect
RST– Reset
DESCRIPTIONThe DS1243Y 64K NV SRAM with Phantom Clock is a fully static nonvolatile RAM (organized as 8192
words by 8 bits) with a built–in real time clock. The DS1243Y has a self–contained lithium energy source
and control circuitry which constantly monitors VCC for an out–of–tolerance condition. When such acondition occurs, the lithium energy source is automatically switched on and write protection is
unconditionally enabled to prevent corrupted data in both the memory and real time clock.
64K NV SRAM with Phantom Clock
28-Pin Encapsulated Package
720-Mil Extended
DS1243Y
The Phantom Clock provides timekeeping information including hundredths of seconds, seconds,
minutes, hours, day, date, month, and year information. The date at the end of the month is automatically
adjusted for months with less than 31 days, including correction for leap years. The Phantom Clock
operates in either 24–hour or 12–hour format with an AM/PM indicator.
RAM READ MODEThe DS1243Y executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) is active (low). The unique address specified by the 13 address inputs (A0–A12) defines which ofthe 8192 bytes of data is to be accessed. Valid data will be available to the eight data output drivers
within tACC (Access Time) after the last address input signal is stable, providing that CE and OE (Output
Enable) access times and states are also satisfied. If OE and CE access times are not satisfied, then data
access must be measured from the later occurring signal (CE or OE) and the limiting parameter is either
tCO for CE or tOE for OE rather than address access.
RAM WRITE MODEThe DS1243Y is in the write mode whenever the WE and CE signals are in the active (low) state after
address inputs are stable. The latter occurring falling edge of CE or WE will determine the start of the
write cycle. The write cycle is terminated by the earlier rising edge of CE or WE. All address inputs must
be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time
(tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during
write cycles to avoid bus contention. However, if the output bus has been enabled (CE and OE active)
then WE will disable the outputs in t ODW from its falling edge.
DATA RETENTION MODEThe DS1243Y provides full functional capability for VCC greater than VTP and write protects by 4.25
volts. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile
static RAM constantly monitors VCC. Should the supply voltage decay, the RAM automatically writeprotects itself. All inputs to the RAM become “don’t care” and all outputs are high impedance. As VCC
falls below approximately 3.0 volts, the power switching circuit connects the lithium energy source to
RAM to retain data. During power–up, when VCC rises above approximately 3.0 volts, the power
switching circuit connects external VCC to the RAM and disconnects the lithium energy source. NormalRAM operation can resume after VCC exceeds 4.5 volts.
FRESHNESS SEALEach DS1243Y is shipped from Dallas Semiconductor with its lithium energy source disconnected,
insuring full energy capacity. When VCC is first applied at a level greater than VTP, the lithium energy
source is enabled for battery backup operation.
PHANTOM CLOCK OPERATIONCommunication with the Phantom Clock is established by pattern recognition on a serial bit stream of 64
bits which must be matched by executing 64 consecutive write cycles containing the proper data on DQ0.
All accesses which occur prior to recognition of the 64–bit pattern are directed to memory.
DS1243Y
Data transfer to and from the timekeeping function is accomplished with a serial bit stream under control
of Chip Enable (CE), Output Enable (OE), and Write Enable (WE). Initially, a read cycle to any memory
location using the CE and OE control of the Phantom Clock starts the pattern recognition sequence by
moving a pointer to the first bit of the 64–bit comparison register. Next, 64 consecutive write cycles are
executed using the CE and WE control of the SmartWatch. These 64 write cycles are used only to gain
access to the Phantom Clock. Therefore, any address to the memory in the socket is acceptable.
However, the write cycles generated to gain access to the Phantom Clock are also writing data to a
location in the mated RAM. The preferred way to manage this requirement is to set aside just one address
location in RAM as a Phantom Clock scratch pad. When the first write cycle is executed, it is comparedto bit 0 of the 64–bit comparison register. If a match is found, the pointer increments to the next location
of the comparison register and awaits the next write cycle. If a match is not found, the pointer does not
advance and all subsequent write cycles are ignored. If a read cycle occurs at any time during pattern
recognition, the present sequence is aborted and the comparison register pointer is reset. Pattern
recognition continues for a total of 64 write cycles as described above until all the bits in the comparison
register have been matched (this bit pattern is shown in Figure 1). With a correct match for 64 bits, thePhantom Clock is enabled and data transfer to or from the timekeeping registers can proceed. The next 64
cycles will cause the Phantom Clock to either receive or transmit data on DQ0, depending on the level of
the OE pin or the WE pin. Cycles to other locations outside the memory block can be interleaved with cycles without interrupting the pattern recognition sequence or data transfer sequence to the Phantom
Clock.
PHANTOM CLOCK
REGISTER INFORMATIONThe Phantom Clock information is contained in 8 registers of 8 bits, each of which is sequentiallyaccessed 1 bit at a time after the 64–bit pattern recognition sequence has been completed. When updating
the Phantom Clock registers, each register must be handled in groups of 8 bits. Writing and reading
individual bits within a register could produce erroneous results. These read/write registers are defined in
Figure 2.
Data contained in the Phantom Clock register is in binary coded decimal format (BCD). Reading and
writing the registers is always accomplished by stepping through all 8 registers, starting with bit 0 of
register 0 and ending with bit 7 of register 7.
DS1243Y
PHANTOM CLOCK REGISTER DEFINITION Figure 1
NOTE:The pattern recognition in Hex is C5, 3A, A3, 5C, C5, 3A, A3, 5C. The odds of this pattern beingaccidentally duplicated and causing inadvertent entry to the Phantom Clock is less than 1 in 1019. This
pattern is sent to the Phantom Clock LSB to MSB.
DS1243Y
PHANTOM CLOCK REGISTER DEFINITION Figure 2
AM–PM/12/24 MODEBit 7 of the hours register is defined as the 12– or 24–hour mode select bit. When high, the 12–hour mode
is selected. In the 12–hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24–hour mode,
bit 5 is the second 10–hour bit (20–23 hours).
OSCILLATOR AND RESET BITSBits 4 and 5 of the day register are used to control the RESET and oscillator functions. Bit 4 controls the
RESET (pin 1). When the RESET bit is set to logic 1, the RESET input pin is ignored. When the RESET
bit is set to logic 0, a low input on the RESET pin will cause the Phantom Clock to abort data transfer
without changing data in the watch registers. Bit 5 controls the oscillator. When set to logic 1, the
oscillator is off. When set to logic 0, the oscillator turns on and the watch becomes operational. These
bits are shipped from the factory set to a logic 1.
ZERO BITS
DS1243Y
ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground –0.3V to +7.0V
Operating Temperature 0°C to 70°C
Storage Temperature –40°C to +70°C
Soldering Temperature 260°C for 10 seconds (See Note 13)This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (0°C to 70°C)
DC ELECTRICAL CHARACTERISTICS (0°C to 70°C; VCC = 5V ± 10%)
DC TEST CONDITIONSOutputs are open; all voltages are referenced to ground.
CAPACITANCE (tA = 25°C)
DS1243Y
MEMORY AC ELECTRICAL
CHARACTERISTICS (0°C to 70°C; VCC = 5.0V ± 10%)
Write Pulse Width
Output Active from
AC TEST CONDITIONSOutput Load: 50 pF + 1TTL Gate
Input Pulse Levels: 0–3V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5 ns
