DS1230W-150 ,3.3V 256K Nonvolatile SRAMPIN DESCRIPTIONA0 - A14 - Address InputsDQ0 - DQ7 - Data In/Data OutCE - Chip EnableWE - Write Enab ..
DS1230W-150 ,3.3V 256K Nonvolatile SRAMPIN DESCRIPTIONA0 - A14 - Address InputsDQ0 - DQ7 - Data In/Data OutCE - Chip EnableWE - Write Enab ..
DS1230W-150+ ,3.3V 256k Nonvolatile SRAMFEATURES PIN ASSIGNMENT 10 years minimum data retention in theVA14 1 28 CCabsence of external powe ..
DS1230WP-150 ,3.3V 256K Nonvolatile SRAMFEATURES PIN ASSIGNMENT 10 years minimum data retention in theVA14 1 28 CCabsence of external powe ..
DS1230WP-150+ ,3.3V 256k Nonvolatile SRAMDS1230W3.3V 256k Nonvolatile SRAM
DS1230Y ,256k Nonvolatile SRAMFEATURES PIN ASSIGNMENT 10 years minimum data retention in theA14 1 28VCCabsence of external power ..
DTA124ES , DTA/DTC SERIES
DTA124-ES , DTA/DTC SERIES
DTA124EUA T106 , PNP -100mA -50V Digital Transistors (Bias Resistor Built-in Transistors)
DTA124EUA T106 , PNP -100mA -50V Digital Transistors (Bias Resistor Built-in Transistors)
DTA124EUAT106 , PNP -100mA -50V Digital Transistors (Bias Resistor Built-in Transistors)
DTA124GKA , -100mA / -50V Digital transistors (with built-in resistors)
DS1230W-150-DS1230W-150+-DS1230WP-150-DS1230WP-150+
3.3V 256k Nonvolatile SRAM
FEATURES10 years minimum data retention in the
absence of external powerData is automatically protected during power
lossReplaces 32k x 8 volatile static RAM,
EEPROM or Flash memoryUnlimited write cyclesLow-power CMOSRead and write access times as fast as 100nsLithium energy source is electrically
disconnected to retain freshness until power is
applied for the first timeOptional industrial temperature range of
-40�C to +85�C, designated INDJEDEC standard 28-pin DIP packagePowerCap Module (PCM) package- Directly surface-mountable moduleReplaceable snap-on PowerCap provides
lithium backup batteryStandardized pinout for all nonvolatile
SRAM products- Detachment feature on PowerCap allows
easy removal using a regular screwdriver
PIN ASSIGNMENT
PIN DESCRIPTIONA0 - A14 - Address InputsDQ0 - DQ7 - Data In/Data Out - Chip Enable - Write Enable - Output Enable
VCC - Power (+3.3V)
GND - Ground
NC - No Connect
DS1230W
3.3V 256k Nonvolatile SRAM28-Pin Encapsulated Package
740-Mil Extended
DQ0
DQ1
GND
DQ2
VCC
DQ7
DQ6
DQ5
DQ3
DQ4
A12
A14NCNCNCNCVCC
WEOECEDQ7DQ6DQ5DQ4DQ3DQ2DQ1DQ0GNDNC
34-Pin PowerCap Module (PCM)
(Uses DS9034PC PowerCap)
DS1230W
DESCRIPTIONThe DS1230W 3.3V 256k Nonvolatile SRAM is a 262,144-bit, fully static, nonvolatile SRAM organized
as 32,768 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control
circuitry, which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs,
the lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. DIP-package DS1230W devices can be used in place of existing 32k x 8 staticRAMs directly conforming to the popular bytewide 28-pin DIP standard. The DIP devices also match the
pinout of 28256 EEPROMs, allowing direct substitution while enhancing performance. DS1230W
devices in the PowerCap Module package are directly surface mountable and are normally paired with a
DS9034PC PowerCap to form a complete Nonvolatile SRAM Module. There is no limit on the number of
write cycles that can be executed and no additional support circuitry is required for microprocessorinterfacing.
READ MODEThe DS1230W executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 15 address inputs
(A0 – A14) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later-occurring signal (CE or OE) and the limiting
parameter is either tCO for CE or tOE for OE rather than address access.
WRITE MODEThe DS1230W executes a write cycle whenever the WE and CE signals are active (low) after address
inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the write cycle.
The write cycle is terminated by the earlier rising edge of CE or WE. All address inputs must be kept
valid throughout the write cycle. WE must return to the high state for a minimum recovery time (tWR)
before another cycle can be initiated. The OEcontrol signal should be kept inactive (high) during write
cycles to avoid bus contention. However, if the output drivers are enabled (CE and OE active) then WE
will disable the outputs in tODW from its falling edge.
DATA RETENTION MODEThe DS1230W provides full functional capability for VCC greater than 3.0 volts and write protects by 2.8
volts. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile
static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically
write protect themselves, all inputs become “don’t care,” and all outputs become high-impedance. As VCCfalls below approximately 2.5 volts, a power switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when VCC rises above approximately 2.5 volts, the power
switching circuit connects external VCC to RAM and disconnects the lithium energy source. Normal
RAM operation can resume after VCC exceeds 3.0 volts.
FRESHNESS SEALEach DS1230W device is shipped from Dallas Semiconductor with its lithium energy sourcedisconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than 3.0
volts, the lithium energy source is enabled for battery back-up operation.
DS1230W
PACKAGESThe DS1230W is available in two packages: 28-pin DIP and 34-pin PowerCap Module (PCM). The 28-
pin DIP integrates a lithium battery, an SRAM memory and a nonvolatile control function into a single
package with a JEDEC-standard, 600-mil DIP pinout. The 34-pin PowerCap Module integrates SRAM
memory and nonvolatile control into a module base along with contacts for connection to the lithium
battery in the DS9034PC PowerCap. The PowerCap Module package design allows a DS1230W to besurface mounted without subjecting its lithium backup battery to destructive high-temperature reflow
soldering. After a DS1230W module base is reflow soldered, a DS9034PC PowerCap is snapped on top
of the base to form a complete Nonvolatile SRAM module. The DS9034PC is keyed to prevent improper
attachment. DS1230W module bases and DS9034PC PowerCaps are ordered separately and shipped in
separate containers. See the DS9034PC data sheet for further information.
ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground -0.3V to +4.6VOperating Temperature 0°C to 70°C, -40°C to +85°C for IND parts
Storage Temperature -40°C to +70°C, -40°C to +85°C for IND parts
Soldering Temperature 260°C for 10 secondsThis is a stress rating only and functional operation of the device at these or any other conditionsabove those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (tA: See Note 10)
DC ELECTRICAL CHARACTERISTICS (tA: See Note 10) (VCC= 3.3V ± 0.3V)
DS1230W
CAPACITANCE (tA=25�C)
AC ELECTRICAL CHARACTERISTICS (tA: See Note 10) (VCC= 3.3V ± 0.3V)
DS1230W
READ CYCLESEE NOTE 1
WRITE CYCLE 1SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
DS1230W
WRITE CYCLE 2SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
POWER-DOWN/POWER-UP CONDITION
