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DS1220AD-150IND+
2k x 8 CMOS nonvolatile SRAM, 100ns
FEATURES10 years minimum data retention in the
absence of external powerData is automatically protected during power
lossDirectly replaces 2k x 8 volatile static RAM
or EEPROMUnlimited write cyclesLow-power CMOSJEDEC standard 24-pin DIP packageRead and write access times as fast as 100 nsLithium energy source is electrically
disconnected to retain freshness until poweris applied for the first timeFull ±10% VCC operating range (DS1220AD)Optional ±5% VCC operating range
(DS1220AB)Optional industrial temperature range of
-40°C to +85°C, designated IND
PIN ASSIGNMENT24-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
PIN DESCRIPTIONA0-A10 - Address Inputs
DQ0-DQ7 - Data In/Data Out- Chip Enable- Write Enable- Output Enable
VCC - Power (+5V)
GND - Ground
DESCRIPTIONThe DS1220AB and DS1220AD 16k Nonvolatile SRAMs are 16,384-bit, fully static, nonvolatile SRAMs
organized as 2048 words by 8 bits. Each NV SRAM has a self-contained lithium energy source andcontrol circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. The NV SRAMs can be used in place of existing 2k x 8 SRAMs
directly conforming to the popular bytewide 24-pin DIP standard. The devices also match the pinout of
the 2716 EPROM and the 2816 EEPROM, allowing direct substitution while enhancing performance.There is no limit on the number of write cycles that can be executed and no additional support circuitry is
DS1220AB/AD
16k Nonvolatile SRAMVCC
DQ0
DQ1
GND
DQ2
DQ7
DQ6
DQ5
DQ3
DQ4
DS1220AB/AD
READ MODEThe DS1220AB and DS1220AD execute a read cycle wheneverWE(Write Enable) is inactive (high) and(Chip Enable) and OE(Output Enable) are active (low). The unique address specified by the 11address inputs (A0-A10) defines which of the 2048 bytes of data is to be accessed. Valid data will be
available to the eight data output drivers within tACC (Access Time) after the last address input signal is
stable, providing that the CEand OEaccess times are also satisfied. If CEand OEaccess times are not
satisfied, then data access must be measured from the later-occurring signal and the limiting parameter is
either tCO for CEor tOE for OE rather than address access.
WRITE MODEThe DS1220AB and DS1220AD execute a write cycle whenever theWEand CE signals are active (low)
after address inputs are stable. The latter occurring falling edge of CEorWEwill determine the start of
the write cycle. The write cycle is terminated by the earlier rising edge of CEorWE. All address inputs
must be kept valid throughout the write cycle. WEmust return to the high state for a minimum recovery
time (tWR ) before another cycle can be initiated. The OEcontrol signal should be kept inactive (high)
during write cycles to avoid bus contention. However, if the output drivers are enabled (CEandOE
active) thenWEwill disable the outputs in tODW from its falling edge.
DATA RETENTION MODEThe DS1220AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5V. The DS1220AD provides full functional capability for VCC greater than 4.5 volts and write protectsby 4.25V. Data is maintained in the absence of VCC without any additional support circuitry. The
nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high
impedance. As VCC falls below approximately 3.0 volts, a power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 3.0 volts,the power switching circuit connects external VCC to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1220AB and 4.5 volts for the
DS1220AD.
FRESHNESS SEALEach DS1220 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,guaranteeing full energy capacity. When VCC is first applied at a level of greater than VTP, the lithium
energy source is enabled for battery backup operation.
DS1220AB/AD
ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground -0.3V to +7.0V
Operating Temperature 0°C to 70°C; -40°C to +85°C for IND parts
Storage Temperature -40°C to +70°C; -40°C to +85°C for IND parts
Soldering Temperature 260°C for 10 secondsThis is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (TA: See Note 10) (VCC =5V ± 5% for DS1220AB) (TA: See Note 10)
DC ELECTRICAL CHARACTERISTICS (VCC =5V ± 10% for DS1220AD)
CAPACITANCE (TA =25°C)
DS1220AB/AD
(VCC =5.0V ± 5% for DS1220AB) (TA: See Note 10)
AC ELECTRICAL CHARACTERISTICS (VCC =5.0V ± 10% for DS1220AD)
DS1220AB/AD
AC ELECTRICAL CHARACTERISTICS (cont’d)
DS1220AB/AD
READ CYCLESEE NOTE 1
WRITE CYCLE 1SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
