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DS1135-6 |DS11356DALLASN/a72avai3-in-1 High-Speed Silicon Delay Line


DS1135-6 ,3-in-1 High-Speed Silicon Delay LineFEATURES PIN ASSIGNMENT All-silicon timing circuit Three independent buffered delays IN1 ..
DS1135L ,3-Volt 3-in-1 High-Speed Silicon Delay LinePIN DESCRIPTION IN1-IN3 - Input Signals OUT1-OUT3 - Output Signals V - +3V Supply CCGND ..
DS1135L ,3-Volt 3-in-1 High-Speed Silicon Delay LineFEATURES PIN ASSIGNMENT  All-Silicon Timing Circuit  Three Independent Buffered Delays  Sta ..
DS1135LU-10 ,3V 3-in-1 High-Speed Silicon Delay LineFEATURES PIN ASSIGNMENT All-silicon timing circuit Three independent buffered delays Stable and ..
DS1135LU-30 ,3-Volt 3-in-1 High-Speed Silicon Delay Line DS1135L 3V 3-in-1 High-Speed Silicon Delay Line
DS1135LU-30+ ,3-Volt 3-in-1 High-Speed Silicon Delay LineFEATURES PIN ASSIGNMENT  All-Silicon Timing Circuit  Three Independent Buffered Delays  Sta ..
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DTA114EUA T106 , DTA114E series
DTA114EUA T106 , DTA114E series
DTA114EUAT106 , DTA114E series
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DS1135-6
3-in-1 High-Speed Silicon Delay Line
FEATURESAll-silicon timing circuitThree independent buffered delaysStable and precise over temperature and
voltageLeading and trailing edge precision preserves
the input symmetryStandard 8-pin DIP and 8-pin SOIC(150 mil)Vapor phasing, IR and wave solderableAvailable in Tape and ReelCommercial and industrial temperature ranges
available; see order info table5V operation (for 3V operation, see part
number DS1135L)Recommended replacement for DS1013 and
DS1035
PIN ASSIGNMENT
PIN DESCRIPTION
IN1-IN3 - Input Signals
OUT1-OUT3 - Output Signals
VCC- +5V Supply
GND - Ground
DESCRIPTION

The DS1135 series is a low-power, +5-volt high-speed version of the popular DS1013 and DS1035.
The DS1135 series of delay lines have three independent logic buffered delays in a single package. The
device is Dallas Semiconductor’s fastest 3-in-1 delay line. It is available in a standard 8-pin DIP and
150 mil 8-pin Mini-SOIC, as well as an 8-pin, 118 mil uSOP.
The device features precise leading and trailing edge accuracy. It has the inherent reliability of an all-
silicon delay line solution. Each output is capable of driving up to 10 LS loads.
Standard delay values are indicated in Table 1. Customers may contact Dallas Semiconductor at
DS1135
3-in-1 High-Speed Silicon Delay Line

DS1135M 8-Pin DIP
IN2
GND
VCC
OUT1
OUT2
OUT3
IN3
IN1
DS1135Z 8-Pin SOIC (150 mil)
IN2
GND
IN3
IN1VCC
OUT1
OUT2
OUT3
DS1135U 8-Pin 118-mil uSOP
IN2
GND
IN3
IN1VCC
OUT1
OUT2
OUT3
DS1135
LOGIC DIAGRAM Figure 1
PART NUMBER DELAY TABLE (tPLH , tPHL ) Table 1
NOTES:

1. Nominal conditions are +25°C and VCC =+5.0 volts.
2. Voltage range of 4.75 volts to 5.25 volts.
3. Delay accuracies are for both leading and trailing edges.
TEST SETUP DESCRIPTION

Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1135.The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution ) connected to the output. The DS1135 output taps
are selected and connected to the interval counter by a VHF switch control unit. All measurements are
fully automated with each instrument controlled by the computer over an IEEE 488 bus.
ONE OF THREE
DS1135
DS1135 TEST CIRCUIT Figure 2

START
50Ω
50Ω
DS1135
ABSOLUTE MAXIMUM RATINGS*

Voltage on Any Pin Relative to Ground-1.0V to +7.0V
Operating Temperature-40°C to +85°C
Storage Temperature-55°C to +125°C
Soldering TemperatureSee J-STD-020A specification
Short Circuit Output Current 50 mA for 1 second
* This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS (-40°C to +85°C;VCC=+5V±5%)
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C;VCC=+5V±5%)
CAPACITANCE
(TA=25°C)
DS1135
TEST CONDITIONS

Ambient Temperature: 25°C ±=3°C
Supply Voltage (VCC ): 5.0V ±=0.1V
Input Pulse:
High: 3.0V ±=0.1V
Low: 0.0V ±=0.1V
Source Impedance: 50Ω=Max.
Rise and Fall Time: 3.0 ns Max. - Measured between 0.6V and 2.4V.
Pulse Width: 500 ns
Pulse Period: 1 μs
Output Load Capacitance: 15 pF
Output:Each output is loaded with the equivalent of one 74F04 input gate.
Data is measured at the 1.5V level on the rising and falling edges.
NOTE:
The above conditions are for test only and do not restrict the devices under other data sheet conditions.
TIMING DIAGRAM
NOTES:

1. All voltages are referenced to ground.
2. Pulse width and duty cycle specifications may be exceeded, however, accuracy will be application
sensitive with respect to decoupling, layout, etc.
3. Power-up time is the time from the application of power to the time stable delays are being produced
at the output.
tFALL
80%
tRISE
20%
OUT
tPLHtPHL
tOFtOR
DS1135
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading
edge of thefollowing pulse.
tWI (Pulse Width): The elapsed time on the pulse between the 1.5-volt point on the leading edge and the

1.5-volt point on the trailing edge or the 1.5-volt point on the trailing edge and the 1.5-volt point on the
leading edge.
tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the

input pulse.
tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge on the
input pulse.
tPLH (Time Delay, Rising): The elapsed time between the 1.5-volt point on the leading edge of the input

pulse and the 1.5-volt point on the leading edge of the output pulse.
tPHL (Time Delay, Falling): The elapsed time between the 1.5-volt point on the falling edge of the input

pulse and the 1.5-volt point on the falling edge of the output pulse.
ORDERING INFORMATION
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