DS1110 Fast Delivery |IC PHOENIX CO.,LIMITED

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DS1110
10-Tap Silicon Delay Line
General Description
The DS1110 delay line is an improved replacement for
the DS1010. It has ten equally spaced taps providing
delays from 5ns to 500ns. The devices are offered in a
standard 16-pin SO or 14-pin TSSOP. The DS1110 series
delay lines provide a nominal accuracy of ±5% or ±2ns,
whichever is greater, at 5V and +25°C. The DS1110
reproduces the input logic state at the tap 10 output after
a fixed delay as specified by the dash number extension
of the part number. The DS1110 is designed to produce
both leading- and trailing-edge delays with equal preci-
sion. Each tap is capable of driving up to ten 74LS type
loads. Dallas Semiconductor can customize standard
products to meet special needs.
FeaturesAll-Silicon, 5V, 10-Tap Delay LineImproved, Drop-In Replacement for the DS101010 Taps Equally SpacedDelays are Stable and PreciseLeading- and Trailing-Edge AccuracyDelay Tolerance ±5% or ±2ns, whichever is
Greater, at 5V and +25°CEconomicalAuto-Insertable, Low ProfileLow-Power CMOSTTL/CMOS CompatibleVapor Phase, IR, and Wave SolderableFast-Turn PrototypesDelays Specified Over Commercial and Industrial
Temperature RangesCustom Delays AvailableStandard 16-Pin SO or 14-Pin TSSOP
DS1110
10-Tap Silicon Delay Line
TOP VIEW
VCC
TAP1
TAP3
TAP5TAP4
TAP2
N.C.
TAP7
TAP9
TAP10GND
TAP8
TAP6
TSSOP
DS1110E
Pin ConfigurationsOrdering Information
Rev 1; 11/03
PARTTEMP RANGEPIN-PACKAGE
DS1110E-XXX-40°C to +85°C14 TSSOP
DS1110S-XXX-40°C to +85°C16 SO
Applications
Communications Equipment
Medical Devices
Automated Test Equipment
PC Peripheral Devices
Selector Guide appears at end of data sheet.
Pin Configurations continued at end of data sheet.
DS1110
10-Tap Silicon Delay Line
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC= 5.0V ±5%, TA= -40°C to +85°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage on Any Pin Relative to Ground.................-0.5V to +6.0V
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature...................See IPC/JEDEC J-STD-020A
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVCC(Note 1)4.755.05.25V
High-Level Input VoltageVIH(Note 1)2.4VCC
+ 0.3V
Low-Level Input VoltageVIL(Note 1)-0.3+0.8V
Input Leakage CurrentII0V ≤ VI ≤ VCC-1.0+1.0µA
Active CurrentICCVCC = max, period = min (Note 2)40150mA
High-Level Output CurrentIOHVCC = min, VOH = 2.3V-1.0mA
Low-Level Output CurrentIOLVCC = min, VOL = 0.5V12mA
AC ELECTRICAL CHARACTERISTICS
(VCC= 5.0V ±5%, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input Pulse WidthtWI(Note 6)10% of
tap 10ns
+25°C, 5.0V (Notes 3, 5, 6, 7, 9)-2Table 1+2
0°C to +70°C (Notes 4–7)-3Table 1+3Input-to-Tap Delay
(Delays ≤ 40ns)
tPLH
tPHL
-40°C to +85°C (Notes 4–7)-4Table 1+4
+25°C, 5.0V (Notes 3, 5, 6, 7, 9)-5Table 1+5
0°C to +70°C (Notes 4–7)-8Table 1+8Input-to-Tap Delay
(Delays > 40ns)
tPLH
tPHL
-40°C to +85°C (Notes 4–7)-13Table 1+13
Power-Up TimetPU200ms
Input PeriodPeriod(Note 8)
2 (tWI) or 20,
whichever
is greater
DS1110
10-Tap Silicon Delay Line
Note 1:All voltages are referenced to ground.
Note 2:Measured with outputs open.
Note 3:Initial tolerances are ±with respect to the nominal value at +25°C and VCC= 5.0V for both leading and trailing edges.
Note 4:Temperature and voltage tolerances are with respect to the actual delay measured over stated temperature range and a 4.75V
to 5.25V range.
Note 5:Intermediate delay values are available on a custom basis.
Note 6:See Test Conditionssection.
Note 7:All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if tap 1 slows down, all other
taps also slow down; tap 3 can never be faster than tap 2.
Note 8:Pulse width and period specifications may be exceeded; however, accuracy is application sensitive (decoupling, layout, etc.)
Note 9:For Tap 1 delays greater than 20ns, the tolerance is ±3ns or ±5%, whichever is greater.
CAPACITANCE
(TA= +25°C.)
Typical Operating Characteristics
(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input CapacitanceCIN510pF
DS1110-50 TAP 10 DELAY
vs. TEMPERATURE
DS1110 toc04
TEMPERATURE (°C)
DELAY (ns)3510-15-4085
DS1110-500 TAP 10 DELAY
vs. TEMPERATURE
DS1110 toc03
TEMPERATURE (°C)
DELAY (ns)3510-15
500kHz INPUT1.0
DS1110-50 ACTIVE CURRENT
vs. INPUT FREQUENCY
DS1110 toc02
FREQUENCY (MHz)
ACTIVE CURRENT (mA)
15pF LOAD/TAP
VCC = 5.25V
DS1110-500 ACTIVE CURRENT
vs. INPUT FREQUENCY
DS1110 toc01
FREQUENCY (MHz)
ACTIVE CURRENT (mA)
15pF LOAD/TAP
VCC = 5.25V
DS1110
10-Tap Silicon Delay Lineypical Operating Characteristics (continued)
(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
DS1110-50 TAP 10 DELAY
vs. VOLTAGE
DS1110 toc08
VOLTAGE (V)
DELAY (ns)
FALLING EDGE
RISING EDGE
DS1110-500 TAP 10 DELAY
vs. VOLTAGE
DS1110 toc07
VOLTAGE (V)
DELAY (ns)
FALLING EDGE
RISING EDGE
500kHz INPUT
DS1110-50 DELAY vs. TAP
DS1110 toc06
TAP
DELAY (ns)8673452
FALLING EDGE
RISING EDGE
DS1110-500 DELAY vs. TAP
DS1110 toc05
TAP
DELAY (ns)8673452
FALLING EDGE
RISING EDGE
500kHz INPUT
Pin Description
PIN
TSSOPSO
NAMEFUNCTION1INInput2, 3, 15N.C.No Connection8GNDGround
13, 3, 12, 4, 11,
5, 10, 6, 9, 8
14, 4, 13, 5, 12, 6, 11,
7, 10, 9Tap 1–Tap 10Tap Output Number16VCC5.0V
Detailed Description
The DS1110 delay line is an improved replacement for
the DS1010. It has ten equally spaced taps providing
delays from 5ns to 500ns. The devices are offered in a
standard 16-pin SO or 14-pin TSSOP. The DS1110
series delay lines provide a nominal accuracy of ±5%
or ±2ns, whichever is greater, at 5V and +25°C. The
DS1110 reproduces the input logic state at the tap 10
output after a fixed delay as specified by the dash
number extension of the part number. The DS1110 is
designed to produce both leading- and trailing-edge
delays with equal precision. Each tap is capable of dri-
ving up to ten 74LS type loads. Dallas Semiconductor
can customize standard products to meet special
needs. For special requests call 972-371-4348.
DS1110
10-Tap Silicon Delay Line
10%10%
TAP1TAP2TAP9TAP10
10%10%
Figure 1. Logic Diagram
PARTTOTAL DELAY* (ns)DELAY/TAP (ns)
DS1110-50505
DS1110-60606
DS1110-75757.5
DS1110-80808
DS1110-10010010
DS1110-12512512.5
DS1110-15015015
DS1110-17517517.5
DS1110-20020020
DS1110-25025025
DS1110-30030030
DS1110-35035035
DS1110-40040040
DS1110-45045045
DS1110-50050050
Table 1. Part Number by Delay (tPHL, tPLH)
VILIN
OUT
0.8V
VIH
tRISE
2.2V
1.5V
1.5V1.5V
1.5V1.5V
0.8V
2.2V
PERIOD
tWI
tPLH
tPLH
tFALL
tWI
*Custom delays are available.
DS1110
Terminology
Period: The time elapsed between the leading edge of
the first pulse and the leading edge of the following pulse.
tWI(Pulse Width):The elapsed time on the pulse
between the 1.5V point on the leading edge and the
1.5V point on the trailing edge, or the 1.5V point on the
trailing edge and the 1.5V point on the leading edge.
tRISE(Input Rise Time):The elapsed time between the
20% and the 80% point on the leading edge of the
input pulse.
tFALL(Input Fall Time): The elapsed time between the
80% and the 20% point on the trailing edge of the
input pulse.
tPLH(Time Delay, Rising):The elapsed time between
the 1.5V point on the leading edge of the input pulse
and the 1.5V point on the leading edge of any tap out-
put pulse.
tPHL(Time Delay, Falling):The elapsed time between
the 1.5V point on the trailing edge of the input pulse
and the 1.5V point on the trailing edge of any tap out-
put pulse.
Test Setup Description
Figure 3illustrates the hardware configuration used for
measuring the timing parameters on the DS1110. A
precision pulse generator under software control pro-
duces the input waveform. Time delays are measured
by a time interval counter (20ps resolution) connected
10-Tap Silicon Delay Line
PULSE
GENERATOR
TIME
INTERVAL
COUNTER
VHF SWITCH
CONTROL UNIT
STOP
DEVICE UNDER TEST
Z0 = 50Ω
START

Partno	Mfg	Dc	Qty	Available	Descript
DS1110	DS	N/a	30	avai	10-Tap Silicon Delay Line