DS1086Z ,Spread-Spectrum EconOscillatorApplications♦ No External Timing Components RequiredPrinters♦ Power-Down ModeCopiers♦ 10kHz Master ..
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DS1087LU-266+T&R ,3.3V Spread-Spectrum EconOscillatorELECTRICAL CHARACTERISTICS(V = 2.7V to 3.6V, T = -40°C to +85°C.)CC APARAMETER SYMBOL CONDITION MIN ..
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DTA113TKA , Digital transistor (built in resistor)
DTA113TKA , Digital transistor (built in resistor)
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DS1086Z
Spread-Spectrum EconOscillator
General DescriptionThe DS1086 EconOscillator™ is a programmable clock
generator that produces a spread-spectrum (dithered)
square-wave output of frequencies from 260kHz to
133MHz. The selectable dithered output reduces radi-
ated-emission peaks by dithering the frequency 2% or
4% below the programmed frequency. The DS1086 has
a power-down mode and an output-enable control for
power-sensitive applications. All the device settings are
stored in nonvolatile (NV) EEPROM memory allowing it
to operate in stand-alone applications.
ApplicationsPrinters
Copiers
PCs
Computer Peripherals
Cell Phones
Cable Modems
FeaturesUser-Programmable Square-Wave GeneratorFrequencies Programmable from 260kHz to
133MHz2% or 4% Selectable Dithered OutputGlitchless Output-Enable Control2-Wire Serial InterfaceNonvolatile Settings5V SupplyNo External Timing Components RequiredPower-Down Mode10kHz Master Frequency Step SizeEMI Reduction
Spread-Spectrum EconOscillatorPDNGND
SCL
SDASPRD
VCC
OUT
μSOP/SO
TOP VIEW
DS1086
Pin Configuration
Ordering InformationXTL1/OSC1
MICRO-
PROCESSOR
XTL2/OSC2
DITHERED 260kHz TO
133MHz OUTPUT
DECOUPLING CAPACITORS
(0.1μF and 0.01μF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086 NEVER NEEDS
TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.
SPRD
OUT
VCC
VCC
VCC
GND
N.C.
SCL*
SDA*
PDN
DS1086
Typical Operating Circuit19-6224; Rev 2; 3/12
Note: Contact the factory for custom settings.+Denotes a lead(Pb)-free/RoHS-compliant package.
PART TEMP RANGE PIN-PACKAGE DS1086U 0°C to +70°C 8 µSOP
DS1086U+ 0°C to +70°C 8 µSOP
DS1086Z 0°C to +70°C 8 SO
DS1086Z+ 0°C to +70°C 8 SO
DS1086
Spread-Spectrum EconOscillator
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS(VCC= 5V ±5%, TA= 0°C to +70°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSupply VoltageVCC(Note 1)4.755.005.25V
High-Level Input Voltage
(SDA, SCL)VIH0.7 x
VCC
VCC +
0.3V
Low-Level Input Voltage
(SDA, SCL)VIL-0.30.3 x
VCCV
High-Level Input Voltage
(SPRD, PDN, OE)VIH2VCC +
0.3V
Low-Level Input Voltage
(SPRD, PDN, OE)VIL-0.30.8V
DC ELECTRICAL CHARACTERISTICS(VCC= 5V ±5%, TA= 0°C to +70°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSHigh-Level Output Voltage (OUT)VOHIOH = -4mA, VCC = min2.4V
Low-Level Output Voltage (OUT)VOLIOL = 4mA0.4V
High-Level Input CurrentIIHVCC = 5.25V1µA
Low-Level Input CurrentIILVIL = 0V-1µA
Supply Current (Active)ICCCL = 15pF (output at default frequency)35mA
Standby Current (Power-Down)ICCQPower-down mode35µA
Voltage on VCCRelative to Ground ......................-0.5V to +6.0V
Voltage on SPRD, PDN, OE, SDA,
SCL Relative to Ground (See Note 1).......-0.5 to (VCC+ 0.5V)
Continuous Power Dissipation (TA= +70°C)
µSOP (derate 4.5mW/°C above +70°C)........................362mW
SO (derate 5.9mW/°C above +70°C).........................470.6mW
Junction Temperature......................................................+150°C
Operating Temperature Range...............................0°C to +70°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature (reflow)
Lead(Pb)-free................................................................+260°C
Containing lead(Pb) .....................................................+240°C
Note 1:This voltage must not exceed 6.0V.
Spread-Spectrum EconOscillator
MASTER OSCILLATOR CHARACTERISTICS (VCC= 5V ±5%, TA= 0°C to +70°C.)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITSMaster Oscillator RangefOSC(Note 2)66133MHz
Default Master Oscillator Frequencyf097.1MHz
Default frequency (f0)-0.75+0.75Master Oscillator Frequency
Tolerance f 0
VCC = 5V,
TA = +25°C
(Notes 3,17)DAC step size-0.75+0.75
Default frequency-0.75+0.75Voltage Frequency VariationΔ f V
Over voltage range,
TA = +25°C (Note 4)DAC step size-0.75+0.75%
Default frequency-0.5+0.5
133MHz-0.5+0.5Temperature Frequency VariationΔ f T
Over temperature
range, VCC = 5V
(Note 5)66MHz-1.0+1.0
Prescaler bit J0 = 1 (Note 6)2Dither Frequency RangeΔ f Prescaler bit J0 = 0 (Note 6)4%
Integral Nonlinearity of Frequency
DACINLEntire range (Note 7)-0.4+0.4%
DAC Step SizeΔ between two consecutive DAC values
(Note 8)10kHz
DAC SpanFrequency range for one offset setting
(see Table 2)10.24MHz
DAC DefaultFactory default register setting500decimal
Offset Step SizeΔ between two consecutive offset values
(see Table 2)5.12MHz
Offset DefaultOSFactory default OFFSET register setting
(5 LSBs) (see Table 2)
RANGE
(5 LSBs of
RANGE register)
hex
Dither Ratef0/4096Hz
DS1086
Spread-Spectrum EconOscillator
AC ELECTRICAL CHARACTERISTICS(VCC= 5V ±5%, TA= 0°C to +70°C.)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITSFrequency Stable After Prescaler
Change1Period
Frequency Stable After DAC or
Offset Change(Note 9)0.21ms
Power-Up Timetpor + tstab(Note 10)0.10.5ms
Enable of OUT After Exiting
Power-Down Modetstab500µs
OUT High-Z After Entering
Power-Down Modetpdn0.1ms
Load CapacitanceCL(Note 11)1550pF
Output Duty Cycle (OUT)4060%
PDN Rise/Fall Time1µs
AC ELECTRICAL CHARACTERISTICS: 2-WIREINTERFACE(VCC= 5V ±5%, TA= 0°C to +70°C.)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITSFast mode400SCL Clock FrequencyfSCLStandard mode(Note 12)100kHz
Fast mode1.3Bus Free Time Between a STOP
and START ConditiontBUFStandard mode(Note 12)4.7µs
Fast mode0.6Hold Time (Repeated) START
ConditiontHD:STAStandard mode(Notes 12, 13)4.0µs
Fast mode1.3LOW Period of SCLtLOWStandard mode(Note 12)4.7µs
Fast mode0.6HIGH Period of SCLtHIGHStandard mode(Note 12)4.0µs
Fast mode0.6Setup Time for a Repeated
STARTtSU:STAStandard mode(Note 12)4.7µs
Fast modeData Hold TimetHD:DATStandard mode(Notes 12, 14, 15)00.9µs
Fast mode100Data Setup TimetSU:DATStandard mode(Note 12)250ns
Fast mode20 + 0.1CB300Rise Time of Both SDA and SCL
SignalstRStandard mode(Note 16)20 + 0.1CB1000ns
Fast mode20 + 0.1CB300Fall Time of Both SDA and SCL
SignalstFStandard mode(Note 16)20 + 0.1CB1000ns
Spread-Spectrum EconOscillator
AC ELECTRICAL CHARACTERISTICS: 2-WIREINTERFACE (continued)(VCC= 5V ±5%, TA= 0°C to +70°C.)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITSFast mode0.6Setup Time for STOPtSU:STOStandard mode4.0µs
Capacitive Load for Each Bus
LineCB(Note 16)400pF
NV Write-Cycle TimetWR10ms
Input CapacitanceCI5pF
Note 1:All voltages are referenced to ground.
Note 2:DAC and OFFSET register settings must be configured to maintain the master oscillator frequency within this range.
Correct operation of the device is not guaranteed if these limits are exceeded.
Note 3:This is the absolute accuracy of the master oscillator frequency at the default settings.
Note 4:This is the change that is observed in master oscillator frequency with changes in voltage from nominal voltage at = +25°C.
Note 5:This is the percentage frequency change from the +25°C frequency due to temperature at VCC= 5V.The maximum tem-
perature change varies with the master oscillator frequency setting. The minimum occurs at the default master oscillator
frequency (fdefault). The maximum occurs at the extremes of the master oscillator frequency range (66MHz or 133MHz)
(see Figure 2).
Note 6:The dither deviation of the master oscillator frequency is unidirectional and lower than the undithered frequency.
Note 7:The integral nonlinearity of the frequency adjust DAC is a measure of the deviation from a straight line drawn between the
two endpoints of a range. The error is in percentage of the span.
Note 8:This is true when the prescaler = 1.
Note 9:Frequency settles faster for small changes in value. During a change, the frequency transitions smoothly from the original
value to the new value.
Note 10:This indicates the time elapsed between power-up and the output becoming active. An on-chip delay is intentionally
introduced to allow the oscillator to stabilize. tstabis equivalent to approximately 512 master clock cycles and therefore
depends on the programmed clock frequency.
Note 11:Output voltage swings can be impaired at high frequencies combined with high output loading.
Note 12:A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT> 250ns must then be met.
This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line at least tR MAX+ tSU:DAT=
1000ns + 250ns = 1250ns before the SCL line is released.
Note 13:After this period, the first clock pulse is generated.
Note 14:A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the VIH MINof the SCL sig-
nal) in order to bridge the undefined region of the falling edge of SCL.
Note 15:The maximum tHD:DATneed only be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 16:CB—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.
Note 17:Typical frequency shift due to aging is ±0.5%. Aging stressing includes Level 1 moisture reflow preconditioning (24hr
+125°C bake, 168hr 85°C/85%RH moisture soak, and 3 solder reflow passes +240 +0/-5°C peak) followed by 1000hr
max VCCbiased 125°C HTOL, 1000 temperature cycles at -55°C to +125°C, 96hr 130°C/85%RH/5.5V HAST and 168hr
121°C/2 ATM Steam/Unbiased Autoclave.
Typical Operating Characteristics(VCC= 5.0V, TA= 25°C, unless otherwise noted)
DS1086
Spread-Spectrum EconOscillator
SUPPLY CURRENT vs. TEMPERATUREDS1086 toc01
TEMPERATURE (°C)
CURRENT (mA)5030402010
SUPPLY CURRENT vs. VOLTAGE
DS1086 toc02
VOLTAGE (V)
CURRENT (mA)
SUPPLY CURRENT vs. PRESCALER
DS1086 toc03
PRESCALER
CURRENT (mA)
5.25V5.0V4.75V
SUPPLY CURRENT vs. PRESCALERDS1086 toc04
PRESCALER
CURRENT (mA)
70°C, 25°C, AND 0°C
SUPPLY CURRENT vs. TEMPERATURE
WITH OE = 0DS1086 toc05
TEMPERATURE (°C)
CURRENT (mA)5030402010
SUPPLY CURRENT vs. TEMPERATURE
WITH PDN = 0
DS1086 toc06
TEMPERATURE (°C)
CURRENT (5030402010
FREQUENCY PERCENT CHANGE
vs. SUPPLY VOLTAGE
DS1086 toc07
FREQUENCY PERCENT CHANGE FROM 5V
FREQUENCY PERCENT CHANGE
vs. TEMPERATURE
DS1086 toc08
FREQUENCY PERCENT CHANGE FROM 255030402010
070
Spread-Spectrum EconOscillator
Pin Description
PINNAMEFUNCTIONOUTOscillator OutputSPRDDither Enable. When the pin is high, the dither is enabled. When the pin is low, the dither is disabled.
3VCCPower SupplyGNDGround
5OEOutput Enable. When the pin is high, the output buffer is enabled. When the pin is low, the output is
disabled but the master oscillator is still on.PDNPower-Down. When the pin is high, the master oscillator is enabled. When the pin is low, the master
oscillator is disabled (power-down mode).SDA2-Wire Serial Data. This pin is for serial data transfer to and from the device. The pin is open drain
and can be wire-OR’ed with other open-drain or open-collector interfaces.SCL2-Wire Serial Clock. This pin is used to clock data into the device on rising edges and clock data out
on falling edges.
DITHERED 260kHz TO
133MHz OUTPUT
DECOUPLING CAPACITORS
SPRD
OUT
VCC
VCC
VCC
4.7kΩ4.7kΩ
VCC
2-WIRE
INTERFACE
GND
SCL
SDA
PDN
DS1086
Processor-Controlled ModeXTL1/OSC1
MICRO-
PROCESSOR
XTL2/OSC2
DITHERED 260kHz TO
133MHz OUTPUT
DECOUPLING CAPACITORS
(0.1μF and 0.01μF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086 NEVER NEEDS
SPRD
OUT
VCC
VCC
VCC
GND
N.C.
SCL*
SDA*
PDN
DS1086
Stand-Alone Mode
CLOCK SPECTRUM COMPARISON
(9kHz BW, PEAK DETECT)DS1086 fig01
FREQUENCY (MHz)
RELATIVE AMPLITUDE (dBm)919392
DS1086 NO DITHER
DS1086 4% DITHER
CRYSTAL OSC
Figure 1. Clock Spectrum Dither Comparison
MAXIMUM TEMPERATURE VARIATION
vs. MASTER FREQUENCYFREQUENCY (MHz)
FREQUENCY % CHANGE FROM 25
DS1086 fig02
Figure 2. Temperature Variation Over Frequency
DS1086
Spread-Spectrum EconOscillator
Detailed DescriptionA block diagram of the DS1086 is shown in Figure 3.
The internal master oscillator generates a square wave
with a 66MHz to 133MHz frequency range. The fre-
quency of the master oscillator can be programmed
with the DAC register over a two-to-one range in 10kHz
steps. The master oscillator range is larger than the
range possible with the DAC step size, so the OFFSET
register is used to select a smaller range of frequencies
over which the DAC spans. The prescaler can then be
set to divide the master oscillator frequency by 2x
(where x equals 0 to 8) before routing the signal to the
output (OUT) pin.
A programmable triangle-wave generator injects an off-
set element into the master oscillator to dither its output
2% or 4%. The dither is controlled by the J0 bit in the
PRESCALERregister and enabled with the SPRD pin.
The maximum spectral attenuation occurs when the
prescaler is set to 1. The spectral attenuation is
reduced by 2.7dB for every factor of 2 that is used in
the prescaler. This happens because the prescaler’s
divider function tends to average the dither in creating
the lower frequency. However, the most stringent spec-
tral emission limits are imposed on the higher frequen-
cies where the prescaler is set to a low divider ratio.
The external control input, OE, gates the clock output
buffer. The PDNpin disables the master oscillator and
turns off the clock output for power-sensitive applica-
tions*. On power-up, the clock output is disabled until
power is stable and the master oscillator has generated
512 clock cycles. Both controls feature a synchronous
enable that ensures there are no output glitches when
the output is enabled, and a constant time interval (for a
given frequency setting) from an enable signal to the
first output transition.
The control registers are programmed through a 2-wire
interface and are used to determine the output frequen-
cy and settings. Once programmed into EEPROM,
since the register settings are NV, the settings only
need to be reprogrammed if it is desired to reconfigure
the device.
OFFSETFREQUENCY RANGE (MHz)OS - 661.44 to 71.67
OS - 566.56 to 76.79
OS - 471.68 to 81.91
OS - 376.80 to 87.03
OS - 281.92 to 92.15
OS - 187.04 to 97.27
OS*92.16 to 102.39
OS + 197.28 to 107.51
OS + 2102.40 to 112.63
OS + 3107.52 to 117.75
OS + 4112.64 to 122.87
OS + 5117.76 to 127.99
OS + 6122.88 to 133.11
*Factory default setting. OS is the integer value of the 5 LSBs
of the RANGE register.
REGISTERADDRMSBBINARYLSBFACTORY
DEFAULTACCESSPRESCALER02hX1X1XXJ0P3P2P1P011100000bR/W
DAC HIGH08hb9b8b7b6b5b4b3b201111101bR/W
DAC LOW09hb1b0X0X0X0X0X0X000000000bR/W
OFFSET0EhX1X1X1b4b3b2b1b01 1 1 - - - - - b R/W
ADDR0DhX1X1X1X1WCA2A1A011110000bR/W
RANGE37hXXXXXXb4b3b2b1b0x x x - - - - - b R
WRITE EE3FhNO DATA——
Table 1. Register Summary= Don’t care, reads as zero.= Don’t care, reads as one.= Don’t care, reads indeterminate.
X = Don’t care.
Table 2. Offset Settings*The power-down command must persist for at least two out-
