DS1086LU+T-DS1086LU-12F-DS1086LU-12F+ Fast Delivery |IC PHOENIX CO.,LIMITED

DS1086LU+T ,3.3V Spread-Spectrum EconOscillatorapplications. All the device settings are stored in non-♦ Glitchless Output-Enable Controlvolatile ..
DS1086LU-12F ,3.3V Spread-Spectrum EconOscillator DS1086L3.3V Spread-Spectrum EconOscillator
DS1086LU-12F+ ,3.3V Spread-Spectrum EconOscillatorapplications.♦ Nonvolatile Settings
DS1086LU-12F+ ,3.3V Spread-Spectrum EconOscillatorApplications♦ 2.7V to 3.6V SupplyPrinters♦ No External Timing Components RequiredCopiersPCs ♦ Power ..
DS1086LU-12F+ ,3.3V Spread-Spectrum EconOscillatorFeaturesThe DS1086L EconOscillator™ is a 3.3V programmable♦ User-Programmable Square-Wave Generator ..
DS1086Z ,Spread-Spectrum EconOscillatorApplications♦ No External Timing Components RequiredPrinters♦ Power-Down ModeCopiers♦ 10kHz Master ..
DT5C124E , Transistor Switch Digital Transistor Arrays (Inclusdes Resistors)
DT5C124E , Transistor Switch Digital Transistor Arrays (Inclusdes Resistors)
DT5C143E , Transistor Switch Digital Transistor Arrays (Inclusdes Resistors)
DT5C144E , Transistor Switch Digital Transistor Arrays (Inclusdes Resistors)
DTA113TKA , Digital transistor (built in resistor)
DTA113TKA , Digital transistor (built in resistor)

DS1086LU+T-DS1086LU-12F-DS1086LU-12F+
3.3V Spread-Spectrum EconOscillator
DS1086L
3.3V Spread-Spectrum EconOscillator
General Description
The DS1086L EconOscillator™ is a 3.3V programmable
clock generator that produces a spread-spectrum
(dithered) square-wave output of frequencies from
130kHz to 66.6MHz. The selectable dithered output
reduces radiated-emission peaks by dithering the fre-
quency 0.5%,1%, 2%, 4%, or 8% below the pro-
grammed frequency. The DS1086L has a power-down
mode and an output-enable control for power-sensitive
applications. All the device settings are stored in non-
volatile (NV) EEPROM memory allowing it to operate in
stand-alone applications.
Applications
Printers
Copiers
PCs
Computer Peripherals
Cell Phones
Cable Modems
FeaturesUser-Programmable Square-Wave GeneratorFrequencies Programmable from 130kHz to
66.6MHz0.5%, 1%, 2%, 4%, or 8% Selectable Dithered
OutputAdjustable Dither RateGlitchless Output-Enable Control2-Wire Serial InterfaceNonvolatile Settings2.7V to 3.6V SupplyNo External Timing Components RequiredPower-Down Mode5kHz Master Frequency Step SizeEMI ReductionIndustrial Temperature Range: -40°C to +85°C
PDNGND
SCL
SDASPRD
VCC
OUT
µSOP
TOP VIEW
DS1086L
Pin Configuration
Ordering Information
XTL1/OSC1
XTL2/OSC2
DITHERED 130kHz TO
66.6MHz OUTPUT
DECOUPLING CAPACITORS
(0.1μF and 0.01μF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086L NEVER NEEDS
TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.
SPRD
OUT
VCC
VCC
VCC
GND
N.C.
SCL*
SDA*
PDN
DS1086L
Typical Operating Circuit
PARTTEMP RANGEPIN-PACKAGE
DS1086LU-40°C to +85°C8 μSOP (118 mils)
DS1086LU+-40°C to +85°C8 μSOP (118 mils)
EconOscillator is a trademark of Maxim Integrated Products, Inc.
Note: Contact the factory for custom settings.
+Denotes a lead(Pb)-free/RoHS-compliant package.
3.3V Spread-Spectrum EconOscillator
DS1086L
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS
(VCC= 2.7V to 3.6V, TA= -40°C to +85°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVCC(Note 1)2.73.33.6V
High-Level Input Voltage
(SDA, SCL, SPRD, PDN, OE)VIH0.7 x
VCC
VCC +
0.3V
Low-Level Input Voltage
(SDA, SCL SPRD, PDN, OE)VIL-0.30.3 x
VCCV
DC ELECTRICAL CHARACTERISTICS
(VCC= 2.7V to 3.6V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
High-Level Output Voltage (OUT)VOHIOH = -4mA, VCC = min2.4V
Low-Level Output Voltage (OUT)VOLIOL = 4mA00.4V
VOL13mA sink current00.4Low-Level Output Voltage (SDA)VOL26mA sink current00.6V
High-Level Input CurrentIIHVCC = 3.6V1μA
Low-Level Input CurrentIILVIL = 0V-1μA
Supply Current (Active)ICCCL = 15pF (output at default frequency)10mA
Standby Current (Power-Down)ICCQPower-down mode10μA
Voltage Range on VCCRelative to Ground ..........-0.5V to +6.0V
Voltage Range on SPRD, PDN, OE, SDA, and SCL
Relative to Ground*..................................-0.5 to (VCC+ 0.5V)
Continuous Power Dissipation (TA= +70°C)
μSOP (derate 4.5mW/°C above +70°C)........................362mW
Operating Temperature Range...........................-40°C to +85°C
Programming Temperature Range.........................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-55°C to +150°C
Soldering Temperature (reflow)
Lead(Pb)-free................................................................+260°C
Containing lead(Pb)......................................................+240°C
*This voltage must not exceed 6.0V.
3.3V Spread-Spectrum EconOscillator
DS1086L
MASTER OSCILLATOR CHARACTERISTICS
(VCC= 2.7V to 3.6V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Master Oscillator FrequencyfOSC(Note 2)33.366.6MHz
Default Master Oscillator Frequencyf0Factory-programmed default48.65MHz
Default frequency (f0)-0.5+0.5Master Oscillator Frequency
Tolerance f 0
VCC = 3.3V,
TA = +25°C
(Notes 3,17)DAC step size-0.5+0.5
Default frequency-0.75+0.75Voltage Frequency VariationΔ f V
Over voltage range,
TA = +25°C (Note 4)DAC step size-0.75+0.75%
Default frequency-2.0+0.75
66.6MHz-2.0+0.75Temperature Frequency VariationΔ f T
Over temperature
range, VCC = 3.3V
(Note 5)33.3MHz-2.5+0.75
Prescaler bits JS2, JS1, JS0 = 0000.5
Prescaler bits JS2, JS1, JS0 = 0011
Prescaler bits JS2, JS1, JS0 = 0102
Prescaler bits JS2, JS1, JS0 = 1004
Dither Frequency Range (Note 6)Δ f
Prescaler bits JS2, JS1, JS0 = 1118
Integral Nonlinearity of FrequencyINLEntire range (Note 7)-0.6+0.3%
DAC Step SizeΔ between two consecutive DAC values
(Note 8)5kHz
DAC SpanFrequency range for one offset setting
(Table 2)5.12MHz
DAC DefaultFactory default register setting500decimal
Offset Step SizeΔ between two consecutive offset values
(Table 2)2.56MHz
Offset DefaultOSFactory default OFFSET register setting
(5 LSBs) (Table 2)
RANGE
(5 LSBs of
RANGE register)
hex
Prescaler bits JS4, JS3 = 00f0/8192
Prescaler bits JS4, JS3 = 01f0/4096Dither Rate
Prescaler bits JS4, JS3 = 10f0/2048
3.3V Spread-Spectrum EconOscillator
DS1086L
AC ELECTRICAL CHARACTERISTICS
(VCC= 2.7V to 3.6V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Frequency Stable After Prescaler
Change1period
Frequency Stable After DAC or
Offset ChangetDACstab(Note 9)0.11ms
Power-Up Timetpor + tstab(Note 10)0.10.5ms
Enable of OUT After Exiting
Power-Down Modetstab(Note 18)200μs
OUT High-Z After Entering
Power-Down Modetpdn100μs
Load CapacitanceCL(Note 11)1550pF
Output Duty Cycle (OUT)Default frequency4555%
Rise and Fall Time (OE, PDN)1μs
AC ELECTRICAL CHARACTERISTICS—2-WIREINTERFACE
(VCC= 2.7V to 3.6V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Fast mode400SCL Clock FrequencyfSCLStandard mode(Note 12)100kHz
Fast mode1.3Bus Free Time Between a STOP
and START ConditiontBUFStandard mode(Note 12)4.7μs
Fast mode0.6Hold Time (Repeated) START
ConditiontHD:STAStandard mode(Notes 12, 13)4.0μs
Fast mode1.3LOW Period of SCLtLOWStandard mode(Note 12)4.7μs
Fast mode0.6HIGH Period of SCLtHIGHStandard mode(Note 12)4.0μs
Fast mode0.6Setup Time for a Repeated
STARTtSU:STAStandard mode(Note 12)4.7μs
Fast modeData Hold TimetHD:DATStandard mode(Notes 12, 14, 15)00.9μs
Fast mode100Data Setup TimetSU:DATStandard mode(Note 12)250ns
Fast mode20 + 0.1CB300Rise Time of Both SDA and SCL
SignalstRStandard mode(Note 16)20 + 0.1CB1000ns
Fast mode20 + 0.1CB300Fall Time of Both SDA and SCL
SignalstFStandard mode(Note 16)20 + 0.1CB1000ns
3.3V Spread-Spectrum EconOscillator
DS1086L
AC ELECTRICAL CHARACTERISTICS—2-WIREINTERFACE (continued)
(VCC= 2.7V to 3.6V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Fast mode0.6Setup Time for STOPtSU:STOStandard mode4.0μs
Capacitive Load for Each Bus
LineCB(Note 16)400pF
EEPROM Write Cycle TimetWR10ms
Input CapacitanceCI5pF
NONVOLATILEMEMORYCHARACTERISTICS
(VCC= 2.7V to 3.6V)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
EEPROM Writes+70°C10,000
Note 1:All voltages are referenced to ground.
Note 2:DAC and OFFSET register settings must be configured to maintain the master oscillator frequency within this range.
Correct operation of the device is not guaranteed if these limits are exceeded.
Note 3:This is the absolute accuracy of the master oscillator frequency at the default settings.
Note 4:This is the change that is observed in master oscillator frequency with changes in voltage from nominal voltage at = +25°C.
Note 5:This is the percentage frequency change from the +25°C frequency due to temperature at VCC= 3.3V.The maximum temper-
ature change varies with the master oscillator frequency setting. The minimum occurs at the default master oscillator frequen-
cy (fdefault). The maximum occurs at the extremes of the master oscillator frequency range (33.3MHz or 66.6MHz).
Note 6:The dither deviation of the master oscillator frequency is unidirectional and lower than the undithered frequency.
Note 7:The integral nonlinearity of the frequency is a measure of the deviation from a straight line drawn between the two end-
points (fosc(MIN)to fosc(MAX)) of the range. The error is in percentage of the span.
Note 8:This is true when the prescaler = 1.
Note 9:Frequency settles faster for small changes in value. During a change, the frequency transitions smoothly from the original
value to the new value.
Note 10:This indicates the time elapsed between power-up and the output becoming active. An on-chip delay is intentionally
introduced to allow the oscillator to stabilize. tstabis equivalent to approximately 512 master clock cycles and therefore
depends on the programmed clock frequency.
Note 11:Output voltage swings can be impaired at high frequencies combined with high output loading.
Note 12:A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT> 250ns must then be met.
This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line at least tR MAX+ tSU:DAT=
1000ns + 250ns = 1250ns before the SCL line is released.
Note 13:After this period, the first clock pulse is generated.
Note 14:A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the VIH MINof the SCL
signal) to bridge the undefined region of the falling edge of SCL.
Note 15:The maximum tHD:DATneed only be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 16:CB—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.
Note 17:Typical frequency shift due to aging is ±0.5%. Aging stressing includes Level 1 moisture reflow preconditioning (24hr
+125°C bake, 168hr 85°C/85%RH moisture soak, and three solder reflow passes +240 +0/-5°C peak) followed by 1000hr
max VCCbiased 125°C HTOL, 1000 temperature cycles at -55°C to +125°C, 96hr 130°C/85%RH/3.6V HAST and 168hr
121°C/2 ATM Steam/Unbiased Autoclave.
Note 18:tstabis the time required after exiting power-down to the beginning of output oscillations. In addition, a delay of tDACstab
is required before the frequency will be within its specified tolerance.
3.3V Spread-Spectrum EconOscillator
DS1086L
Typical Operating Characteristics
(VCC= 3.3V, TA= 25°C, unless otherwise noted.)
SUPPLY CURRENT vs.
MASTER OSCILLATOR FREQUENCY
DS1086L toc01
MASTER FREQUENCY (MHz)
SUPPLY CURRENT (mA)60363942485154455766
15pF LOAD
4.7pF LOAD
PRESCALER = 1
SUPPLY CURRENT vs. TEMPERATURE
DS1086L toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)3510-15
fO = 66MHz
fO = 50MHz
fO = 33.3MHz
PRESCALER = 1
15pF LOAD
SUPPLY CURRENT vs. PRESCALER
DS1086L toc03
PRESCALER
SUPPLY CURRENT (mA)
fO = 50MHz
15pF LOAD
MASTER OSCILLATOR FREQUENCY PERCENT
CHANGE vs. SUPPLY VOLTAGE
DS1086L toc04
SUPPLY VOLTAGE (V)
PERCENT CHANGET (%)
fO = 66MHz
fO = 50MHz
fO = 33.3MHz
PRESCALER = 1
MASTER OSCILLATOR FREQUENCY PERCENT
CHANGE vs. TEMPERATURE
DS1086L toc05
TEMPERATURE (°C)
PERCENT CHANGE (%)35-1510
fO = 66MHz
fO = 50MHz
fO = 33.3MHz
PRESCALER = 1
15pF LOAD
DUTY CYCLE vs. TEMPERATURE
DS1086L toc06
TEMPERATURE (°C)
DUTY CYCLE (%)3510-15
fO = 66MHz
fO = 50MHz
fO = 33.3MHz
PRESCALER = 1
DUTY CYCLE vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
DS1086L toc07
DUTY CYCLE (%)
fO = 66MHz
fO = 50MHz
fO = 33.3MHz
PRESCALER = 1
3.3V Spread-Spectrum EconOscillator
DS1086L
POWER-DOWN CURRENT vs. TEMPERATURE
DS1086L toc09
TEMPERATURE (°C)
POWER-DOWN CURRENT (3510-15
SUPPLY CURRENT WITH OUTPUT
DISABLED vs. SUPPLY VOLTAGE
DS1086L toc10
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
fO = 66MHz
SUPPLY CURRENT WITH OUTPUT
DISABLED vs. TEMPERATURE
DS1086L toc11
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)3510-15
fO = 66MHzypical Operating Characteristics (continued)
(VCC= 3.3V, TA= 25°C, unless otherwise noted.)
POWER-DOWN CURRENT vs.
SUPPLY VOLTAGE
DS1086L toc08
SUPPLY VOLTAGE (V)
POWER-DOWN CURRENT (
2.73.6
3.3V Spread-Spectrum EconOscillator
DS1086L
Pin Description
PINNAMEFUNCTIONOUTOscillator Output. The output frequency is determined by the OFFSET, DAC, and prescaler registers.SPRDDither Enable. When the pin is high, the dither is enabled. When the pin is low, the dither is disabled.
3VCCPower SupplyGNDGround
5OEOutput Enable. When the pin is high, the output buffer is enabled. When the pin is low, the output is
disabled but the master oscillator is still on.PDNPower-Down. When the pin is high, the master oscillator is enabled. When the pin is low, the master
oscillator is disabled (power-down mode).SDA2-Wire Serial Data. This pin is for serial data transfer to and from the device. The pin is open drain and
can be wire-ORed with other open-drain or open-collector interfaces.SCL2-Wire Serial Clock. This pin is used to clock data into the device on rising edges and clock data out on
falling edges.
DITHERED 260kHz TO
133MHz OUTPUT
DECOUPLING CAPACITORS
(0.1μF and 0.01μF)
SPRD
OUT
VCC
VCC
VCC
4.7kΩ4.7kΩ
VCC
2-WIRE
INTERFACE
GND
SCL
SDA
PDN
DS1086L
Processor-Controlled Mode
XTL1/OSC1
XTL2/OSC2
DITHERED 130kHz TO
66.6MHz OUTPUT
DECOUPLING CAPACITORS
(0.1μF and 0.01μF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086L NEVER NEEDS
TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.
SPRD
OUT
VCC
VCC
VCC
GND
N.C.
SCL*
SDA*
PDN
DS1086L
Stand-Alone Mode
SPECTRUM COMPARISON
(12OkHz BW, SAMPLE DETECT)
DS1086L fig01
FREQUENCY (MHz)
POWER SPECTRUM (dBm)494745
0.5%NO
SPREAD
fo = 50MHz
DITHER RATE = fo/4096
Figure 1. Clock Spectrum Dither Comparison
MAXIMUM THERMAL VARIATION vs.
MASTER OSCILLATOR FREQUENCY
DS1086L fig02
MASTER FREQUENCY (MHz)
SUPPLY CURRENT (mA)603639424851544557
-4%
-3%
-2%
-1%
-5%66
Figure 2. Temperature Variation Over Frequency
3.3V Spread-Spectrum EconOscillator
DS1086L
Detailed Description
A block diagram of the DS1086L is shown in Figure 3.
The internal master oscillator generates a square wave
with a 33.3MHz to 66.6MHz frequency range. The fre-
quency of the master oscillator can be programmed
with the DAC register over a two-to-one range in 5kHz
steps. The master oscillator range is larger than the
range possible with the DAC step size, so the OFFSET
register is used to select a smaller range of frequencies
over which the DAC spans. The prescaler can then be
set to divide the master oscillator frequency by 2x
(where x equals 0 to 8) before routing the signal to the
output (OUT) pin.
A programmable triangle-wave generator injects an off-
set element into the master oscillator to dither its output
0.5%, 1%, 2%, 4%, or 8%. The dither magnitude is con-
trolled by the JS2, JS1, and JS0 bits in the PRESCALER
word and enabled with the SPRD pin. Futhermore, the
dither rate is controlled by the JS4 and JS3 bits in the
PRESCALER word and determines the frequency of the
dither. The maximum spectral attenuation occurs when
the prescaler is set to 1 and is reduced by 2.7dB for
happens because the prescaler’s divider function tends
to average the dither in creating the lower frequency.
However, the most stringent spectral emission limits are
imposed on the higher frequencies where the prescaler
is set to a low divider ratio.
The external control input, OE, gates the clock output
buffer. The PDNpin disables the master oscillator and
turns off the clock output for power-sensitive applica-
tions*. On power-up, the clock output is disabled until
power is stable and the master oscillator has generated
512 clock cycles. Both controls feature a synchronous
enable that ensures there are no output glitches when
the output is enabled.
The control registers are programmed through a 2-wire
interface and are used to determine the output frequen-
cy and settings. Once programmed into EEPROM,
since the register settings are NV, the settings only
need to be reprogrammed if it is desired to reconfigure
the device.
SDA
VCC
SCL
2-WIRE
INTERFACE
VCC
DAC
OFFSET
EEPROM CONTROL
REGISTERS
PRESCALER
ADDR
RANGE
SPRD
PDN
OUT
DAC
TRIANGLE WAVE
GENERATOR
VOLTAGE-CONTROLLED
OSCILLATOR
PRESCALER
BY 1, 2, 4...256
GND
MASTER
OSCILLATOR
OUTPUT
DITHER SIGNAL
DITHER
CONTROL
FREQUENCY
CONTROL VOLTAGE
DS1086L
Figure 3. Block Diagram
*The power-down command must persist for at least two out-
put frequency cycles plus 10μs for deglitching purposes.

Partno	Mfg	Dc	Qty	Available	Descript
DS1086LU+T \|DS1086LUT	MAXIM	N/a	2900	avai	3.3V Spread-Spectrum EconOscillator
DS1086LU-12F \|DS1086LU12F	MAXIM	N/a	500	avai	3.3V Spread-Spectrum EconOscillator
DS1086LU-12F+ \|DS1086LU12F	MAXIM	N/a	500	avai	3.3V Spread-Spectrum EconOscillator
DS1086LU-12F+ \|DS1086LU12F	DALLAS	N/a	1689	avai	3.3V Spread-Spectrum EconOscillator
DS1086LU-12F+ \|DS1086LU12F+	DALLS	N/a	1689	avai	3.3V Spread-Spectrum EconOscillator