DP8473N ,DP8473 Floppy Disk Controller PLUS-2General Descriptiondata rate register for selecting 250/300/500 kb/s, Disk
DP8473V ,DP8473 Floppy Disk Controller PLUS-2Pin DescriptionChangedstatus,dualspeedspindlemotorcontrol,lowwrite
DP8480AJ ,DP8480A 10k ECL to TTL Level Translator with LatchDP8480A10kECLtoTTLLevelTranslatorwithLatchApril1990DP8480A10kECLtoTTLLevelTranslatorwithLatchGenera ..
DP8480AN ,DP8480A 10k ECL to TTL Level Translator with LatchFeaturesY16-pin DIPThis circuit translates ECL input levels to TTL output levelsYand provides a fal ..
DP8481N ,TTL to 10k ECL Level Translator with LatchFeaturesY16-pin flat-pack or DIPThis circuit translates TTL input levels to ECL output levelsYandpr ..
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DS90CP02SP/NOPB ,1.5 Gbps 2x2 LVDS Crosspoint Switch 28-UQFN -40 to 85Table 1. PIN DESCRIPTIONSPin PinI/O, Type DescriptionName NumberDIFFERENTIAL INPUTS COMMON TO ALL M ..
DS90CP04TLQ ,4x4 Low Power 2.5 Gb/s LVDS Digital Cross-Point SwitchFeaturesn 2.5 Gbps fully differential data pathsDS90CP04 is a 4x4 digital cross-point switch with b ..
DS90CP04TLQX ,4x4 Low Power 2.5 Gb/s LVDS Digital Cross-Point SwitchBlock Diagrams20028701 2004 National Semiconductor Corporation DS200287 Functional
DS90CP22M-8 ,2X2 800 Mbps LVDS Crosspoint SwitchElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90CP22M-8/NOPB ,800 Mbps 2x2 LVDS Crosspoint Switch 16-SOIC -40 to 85Electrical Characteristics(1)Over recommended operating supply and temperature ranges unless otherw ..
DS90CP22MT ,2X2 800 Mbps LVDS Crosspoint SwitchFeaturesn Low jitter 800 Mbps fully differential data pathDS90CP22 is a 2x2 crosspoint switch utili ..
DP8473N-DP8473V
DP8473 Floppy Disk Controller PLUS-2
TL/F/9384
DP8473
Floppy
Disk
Controller
PLUS-2
July 1990
DP8473 Floppy Disk Controller PLUS-2TM
General Description
This controllerisafull featured floppy disk controllerthatis
software compatible withthe mPD765A,but also includes
many additional hardware and software enhancements.
Theseenhancementsinclude additional logic specificallyre-
quiredforan IBMÉPC, PC-XTÉ, PC-ATÉ,or PS/2É design.
This controller incorporatesa precision analog data separa-
tor, that includesaself trimming delaylineand VCO.Upto
three external filtersare switched automatically dependingthe data rate selected. This provides optimal perform-
anceatthe standardPC data ratesof 250/300 kb/s,and
500 kb/s.It also enables optimum performanceat1 Mb/s
(MFM). Thesefeaturescombineto providethe lowest possi-
blePLL bandwidth,withthe greatest lock range,and hence
the widest window margin.
This controller includes write precompensation circuitry.A
shift registeris usedto providea fixed 125ns early-late
precompensationforall tracksat 500k/300k/250 kb/s(83
nsfor 1MB/s),ora precompensation valuethat scaleswith
(Continued)
Features Fully mPD765Aand IBM-BIOS compatible Integratesall PCXTÉ, PCATÉ,and most PS/2É LogicOn chip24 MHz Crystal Oscillator DMA enable logic IBM compatible address decodeof A0–A2
Ð12mAmPbus interface buffers48mA floppy drive interface buffers Data rateand drive control registers Precision analog data separator Self-calibratingPLLand delayline Automatically choosesoneof three filters Intelligent read algorithm Twopin programmable precompensation modes Other enhancementsupto1 Mb/s data rate Implied seekupto 4000 tracks IBMorISO formatting Low power CMOS, with power down mode
Connection Diagrams
PlasticLeaded Chip Carrier
TL/F/9384–1
Top View
OrderNumberDP8473V
SeeNS Package Number V52A
Dual-In-Line Package
TL/F/9384–2
TopView
OrderNumberDP8473N
SeeNS Package Number N48ATRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
PLUS-2TMisa trademarkof National SemiconductorCorporation.
IBMÉ, PCXTÉ, PCATÉand PS/2Éare registeredtrademarksof InternationalBusiness MachinesCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
