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DP8459V-10-DP8459V-25
All-Code Data Synchronizer
DP8459 All-Code Data Synchronizer
General DescriptionThe DP8459 Data Synchronizerisan integrated phase
locked loop circuit whichhas been designedfor application magnetic hard disk, flexible (floppy) disk, optical disk,and
tape drive memory systemsfor data re-synchronizationand
clock recovery withany standard recording code, operating25 Mb/s. The DP8459is providedina 28-pin PCC
package. Zero phase startis employed during bothdataand
reference clock lock sequencesfor rapid acquisition.An
optional (Customer-controlled) synchronization field
frequency-acquisition feature guarantees lock, accommo-
datingthe preamble types used with GCR (Group Code
Recording), MFM (Modified Frequency Modulation), the
[1,N]run length limited (RLL) codes, and eitherofthe
standard2,7 RLL codes. Precise synchronization window
generation isachievedviaan internal,self-aligningdelayline
which remains accurate independentof temperature, power
supply, external componentandIC process variations. The
DP8459 also incorporatesa digitally controlled( MICROW-
IRE™bus compatible) strobe function with 5-bit resolution
which allowsfor margin testing, error recovery routines,and
precise window calibration.The PLLfilter resides externalto
the chip, withtwo ports providedto allow significant design
flexibility.Synchronization patterndetectioncircuitry issuesa
PREAMBLE DETECTED signal whena pre-determined
lengthofthe user-selected patternis encountered.All digital
inputand output signalsare TTL compatibleanda single,
+5V power supplyis required.The DP8459Vis offeredasa
DP8459V-10 (250 Kbit/sec thru 10 Mbits/sec)or
DP8459V-25 (250 Kbits/sec thru25 Mbit/sec), seeAC
Electrical Characteristics.
Features Fully integrated dual-gain PLL Zero phase start lock sequence 250 Kbit/sec–25 Mbit/sec data rate range Frequency lock capability (optional)forall standard
recording codes Digital window strobe control, 5-bit resolution Two-port PLL filter network PLL free-run (Coast) controlfor opticaldisk defects Synchronization pattern (preamble lock) detection Non-glitching multiplexed read/write clock output +5V supply DP8459 suppliedin 28-pin plastic chip carrier (PCC)
and 40-pin TapePak packages
Connection Diagrams
FIGURE1. DP8459in 28-Pin Plastic Chip Carrier (PCC) V-Type Package Order Number DP8459V-10or DP8459V-25TapePak®isaregistered trademarkof National Semiconductor Corporation.
MICROWIRE™isa trademarkof National SemiconductorCorporation.
TL/F/9322-6
ADVANCEDDecember 1995
DP8459
All-Code
Data
Synchronizer
DP8459©1996 National Semiconductor Corporation TL/F/9322 http:\\ 1
