DP8440V-40 ,microCMOS Programmable 16/64 Mbit Dynamic RAM Controller/DriverFeaturesY40 MHz and 25 MHz operationThe DP8440/41 Dynamic RAM Controllers provide an easyYinterface ..
DP8459V-10 ,All-Code Data SynchronizerFeaturesreference clock lock sequences for rapid acquisition. Ann Fully integrated dual-gain PLLopt ..
DP8459V-25 ,All-Code Data SynchronizerGeneral Descriptionlength of the user-selected pattern is encountered. All digitalThe DP8459 Data S ..
DP8464BN-2 ,Disk Pulse DetectorDP8464BDiskPulseDetectorJune1989DP8464BDiskPulseDetectorGeneralDescriptionTheDP8464BDiskPulseDetect ..
DP8464BN-3 ,Disk Pulse DetectorDP8464BDiskPulseDetectorJune1989DP8464BDiskPulseDetectorGeneralDescriptionTheDP8464BDiskPulseDetect ..
DP8464BV-1 ,Disk Pulse DetectorDP8464BDiskPulseDetectorJune1989DP8464BDiskPulseDetectorGeneralDescriptionTheDP8464BDiskPulseDetect ..
DS90CF384MTD ,+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHzFeaturesn 20 to 65 MHz shift clock supportThe DS90C383 transmitter converts 28 bits of LVCMOS/LVTTL ..
DS90CF384MTDX ,+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHzBlock DiagramsTypical ApplicationDS012887-2®TRI-STATE is a registered trademark of National Semicon ..
DS90CF386MTD ,+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-85 MHzFeaturessec bandwidth) back into parallel 28 bits of CMOS/TTLdatan 20 to 85 MHz shift clock support ..
DS90CF386MTDX ,+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-85 MHzElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90CF386MTDX NOPB ,+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) LinkBlock Diagrams. 174 Revision HistoryNOTE: Page numbers for previous revisions may differ from page ..
DS90CF386MTDX/NOPB ,+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) LinkFeatures 3 DescriptionThe DS90CF386 receiver converts four LVDS (Low1• 20-MHz to 85-MHz Shift Clock ..
DP8440V-40
microCMOS Programmable 16/64 Mbit Dynamic RAM Controller/Driver
TL/F/11718
DP8440-40/DP8440-25/DP8441-40/DP8441-25
microCMOS
Programmable
16/64
Mbit
Dynamic
RAM
Controller/Driver
February1995
DP8440-40/DP8440-25/DP8441-40/DP8441-25
microCMOS Programmable 16/64 Mbit
Dynamic RAM Controller/Driver
General Description
The DP8440/41 Dynamic RAM Controllers providean easy
interface between dynamic RAM arraysand8-,16-,32-and
64-bit microprocessors. The DP8440/41 DRAM Controllers
generateall necessary control and timing signalsto suc-
cessfully interface and design dynamic memory systems.
With significant enhancements overthe DP8420/21/22
predecessors,the DP8440/41are suitablefor high perform-
ance memory systems. These controllers support pageand
burst accessesfor fast page, static column and nibble
DRAMs. Refreshes and accessesare arbitratedon chip.
RASlow time during refreshand RAS precharge timeare
guaranteedby these controllers. Separate precharge coun-
tersfor each RAS output avoid delayed backto backac-
cessesdueto precharge when using memory interleaving.
Programmable features makethe DP8440/41 DRAM Con-
trollers flexible enoughtofit many memory systems.
Features40 MHzand25 MHz operation Page detection Automatic CPU burst accesses Support 1/4/16/64 Mbits DRAMs High capacitance driversfor RAS, CAS,WEandQ out-
puts Supportfor fast page, static column and nibble mode
DRAMs High precision PLL based delayline Byte enablefor word sizeupto32bitsonthe DP844064bitsonthe DP8441 Automatic Internal Refresh Staggered RAS-Only refresh Burstand CAS-before-RAS refresh Error scrubbing during refresh TRI-STATEÉ outputs Easy interfacetoall major microprocessors
Block Diagram
TL/F/11718–1
FIGURE1
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
