DP8422V-33 ,microCMOS Programmable 256K/1M/4M Dynamic RAM Controller/DriversFeaturesYOn chip high precision delay line to guarantee criticalThe DP8420V/21V/22V-33, DP84T22-25 ..
DP8422VX-33 ,microCMOS Programmable 256K/1M/4M Dynamic RAM Controller/Drivers [Life-time buy]FeaturesYOn chip high precision delay line to guarantee criticalThe DP8420V/21V/22V-33, DP84T22-25 ..
DP84244N ,TRI-STATE Drivers Which are Designed For Heavy Capacitive Load Applicationsapplications Output specified from 0.8V to 2.7Vsuchasfastdatabuffersorasmemoryaddressdrivers.The YD ..
DP84244N ,TRI-STATE Drivers Which are Designed For Heavy Capacitive Load ApplicationsElectrical Characteristics’’ provides conditions for actual deviceoperation.Note2:Allcurrentsintode ..
DP8428D-70 ,4.5 V to 5.5 V, 150 mA, 1 megabit high speed dynamic RAM controller/driverFeatures
C
Makes DRAM interface and refresh tasks appear virtu-
ally transparent to the CPU ..
DP8428D-70 ,4.5 V to 5.5 V, 150 mA, 1 megabit high speed dynamic RAM controller/driverGeneral Description
The DP8428 and DP8429 1M DRAM Controller/Drivers are
designed to provide "N ..
DS90CF364MTDX/NOPB ,+3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) LinkFEATURES DESCRIPTIONThe DS90C363 transmitter converts 21 bits of23• 20 to 65 MHz shift clock suppor ..
DS90CF366MTD ,+3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link-85 MHzGeneral Descriptionproblems associated with wide, high speed TTL interfaces.The DS90CF386 receiver ..
DS90CF383AMTD ,+3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz [Life-time buy]Featuresn 20 to 65 MHz shift clock supportThe DS90C383A/DS90CF383A transmitter converts 28 bitsof C ..
DS90CF383AMTDX ,+3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz [Life-time buy]Electrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90CF383BMT ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHzBlock DiagramDS90C383B20098401Order Number DS90C383BMTSee NS Package Number MTD56®TRI-STATE is a re ..
DS90CF383BMTX/NOPB ,+3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz 56-TSSOP -10 to 70FEATURES DESCRIPTIONThe DS90CF383B transmitter converts 28 bits of23• No Special Start-up Sequence ..
DP8422V-33
microCMOS Programmable 256K/1M/4M Dynamic RAM Controller/Drivers
TL/F/11109
DP8420V/21V/22V-33,
DP84T22-25
microCMOS
Programmable
256k/1M/4M
Dynamic
RAM
Controller/Drivers
May 1992
DP8420V/21V/22V-33, DP84T22-25 microCMOS
Programmable 256k/1M/4M Dynamic RAM
Controller/Drivers
General Description
The DP8420V/21V/22V-33, DP84T22-25 dynamic RAM
controllers provide alow cost, single chip interface between
dynamic RAM andall8-, 16- and 32-bit systems. The
DP8420V/21V/22V-33, DP84T22-25 generateallthere-
quired access control signal timingfor DRAMs.An on-chip
refresh request clockis usedto automatically refreshthe
DRAM array. Refreshes and accessesare arbitratedon
chip.If necessary,a WAITor DTACK output inserts wait
statesinto system access cycles, including burst modeac-
cesses. RASlow time during refreshesand RAS precharge
time after refreshesand backto back accessesare guaran-
teed throughthe insertionof wait states. Separate on-chip
precharge countersfor each RAS outputcanbe usedfor
memory interleavingto avoid delayed backto back access- becauseof precharge.An additional featureofthe
DP8422V, DP84T22istwo access portsto simplify dualac-
cessing. Arbitration among these portsand refreshis done chip.To make board level circuit testing easierthe
DP84T22 incorporates TRI-STATEÉ output buffers.
FeaturesOn chip high precision delaylineto guarantee critical
DRAM access timing parameters microCMOS processforlow power High capacitance driversfor RAS, CAS,WE and DRAM
addresson chipOn chip supportfor nibble, page and static column
DRAMs TRI-STATE outputs (DP84T22 only) Byte enable signalson chip allow byte writingina word
sizeupto32bits withno external logic Selectionof controller speeds:25 MHzand33 MHzOn board Port A/PortB (DP8422V, DP84T22 only)/re-
fresh arbitration logic Direct interfacetoall major microprocessors (applica-
tion notes available)4 RASand4 CAS drivers(the RAS and CAS configura-
tionis programmable)of Pins Ýof Address Largest DirectDrive Access
Control (PLCC) Outputs DRAM Memory Ports
Possible Capacity Available
DP8420V 68 9 256kbit 4 Mbytes Single AccessPort
DP8421V 68 10 1Mbit 16 Mbytes Single AccessPort
DP8422V 84 11 4Mbit 64 Mbytes Dual Access Ports(AandB)
DP84T22 84 11 4Mbit 64 Mbytes Dual Accessand TRI-STATE
Block Diagram
DP8420V/21V/22V,DP74T22 DRAM Controller
TL/F/11109–1
FIGURE1
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
StaggeredRefreshTM isatrademark ofNationalSemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
