DP8390DV ,NIC Network Interface ControllerELECTRICAL CHARACTERISTICSYUtilizes low power microCMOS processYIncludes15.0SWITCHING CHARACTERISTI ..
DP8390DV ,NIC Network Interface ControllerDP8390D/NS32490DNICNetworkInterfaceControllerJuly1995DP8390D/NS32490DNICNetworkInterfaceControllerG ..
DP8391 ,Serial Network InterfaceFeaturesYCompatible with Ethernet II, IEEE 802.3 10base5 andThe DP8391 Serial Network Interface (SN ..
DP83910AN ,CMOS SNI Serial Network InterfaceFeaturesercable.Whentransmitting,theSNIconvertsnon-return-to-YCompatible with Ethernet I, IEEE 802. ..
DP83910AV ,CMOS SNI Serial Network InterfaceFeaturesercable.Whentransmitting,theSNIconvertsnon-return-to-YCompatible with Ethernet I, IEEE 802. ..
DP83910AV ,CMOS SNI Serial Network InterfaceDP83910ACMOSSNISerialNetworkInterfaceMay1995DP83910ACMOSSNISerialNetworkInterfaceGeneralDescription ..
DS90C241IVS/NOPB ,5-35MHz DC- Balanced 24-Bit FPD-Link II Serializer 48-TQFP -40 to 105 SNLS209M–NOVEMBER 2005–REVISED JANUARY 20175 Pin Configuration and FunctionsDS90C241 Serializer PF ..
DS90C241IVSX , 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS90C241IVSX/NOPB ,5-35MHz DC- Balanced 24-Bit FPD-Link II Serializer 48-TQFP -40 to 105Features 2 Applications1• 5-MHz to 35-MHz Clock Embedded and DC- • Automotive Central Information D ..
DS90C241QVSX , 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS90C2501SLB ,+2.5V 162 MHz Dual DVO Port LDI Transmitter with built-in scalerFeaturesn Complies with Open LDI and GMCH DVO specificationThe DS90C2501 is a highly integrated sca ..
DS90C3201VS ,3.3V 8 MHz to 135 MHz Dual FPD-Link TransmitterFunctional Descriptionmode,bothDOX[A-E]andDOY[A-E]LVDSportsforoddandThe DS90C3201 and DS90C3202 are ..
DP8390-DP8390DN-DP8390DN.-DP8390DV
NIC Network Interface Controller
TL/F/8582
DP8390D/NS32490D
NIC
Network
Interface
Controller
July 1995
DP8390D/NS32490D NIC Network Interface Controller
General Description
The DP8390D/NS32490D Network Interface Controller
(NIC)isa microCMOS VLSI device designedto ease inter-
facing with CSMA/CD type local area networks including
Ethernet, Thin Ethernet (Cheapernet) and StarLAN. The
NIC implementsall Media Access Control (MAC) layer func-
tionsfor transmission and receptionof packetsin accord-
ance withthe IEEE 802.3 Standard. Unique dual DMA chan-
nels andan internal FIFO providea simpleyet efficient
packet management design.To minimize system parts
countand cost,allbus arbitrationand memory support logic
are integratedintothe NIC.
TheNICisthe heartofa three chipsetthat implementsthe
complete IEEE 802.3 protocol and node electronicsas
shown below. The others includethe DP8391 Serial Net-
work Interface (SNI)andthe DP8392 Coaxial Transceiver
Interface (CTI).
Features Compatible with IEEE 802.3/Ethernet II/Thin Ethernet/
StarLAN Interfaces with8-,16-and 32-bit microprocessor
systems Implements simple, versatile buffer management Requires single5V supply Utilizeslow power microCMOS process Includes Two 16-bit DMA channels 16-byte internal FIFO with programmable threshold Network statistics storage Supports physical, multicast,and broadcast address
filtering Provides3 levelsof loopback Utilizes independent systemand network clocks
Tableof Contents
1.0 SYSTEM DIAGRAM
2.0 BLOCK DIAGRAM
3.0 FUNCTIONAL DESCRIPTION
4.0 TRANSMIT/RECEIVE PACKET ENCAPSULATION/
DECAPSULATION
5.0PIN DESCRIPTIONS
6.0 DIRECT MEMORY ACCESS CONTROL (DMA)
7.0 PACKET RECEPTION
8.0 PACKET TRANSMISSION
9.0 REMOTE DMA
10.0 INTERNAL REGISTERS
11.0 INITIALIZATION PROCEDURES
12.0 LOOPBACK DIAGNOSTICS
13.0 BUS ARBITRATION AND TIMING
14.0 PRELIMINARY ELECTRICAL CHARACTERISTICS
15.0 SWITCHING CHARACTERISTICS
16.0 PHYSICAL DIMENSIONS
1.0 System Diagram
IEEE802.3 CompatibleEthernet/Thin EthernetLocalArea Network ChipSet
TL/F/8582–1
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
