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DP83848C ,PHYTER Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer TransceiverFeatures1• Multiple Temperature Range from –40°C to 105°C • IEEE 802.3 ENDEC, 10BASE-T Transceivers ..
DP83848CVV , Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
DP83848CVV , Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
DP83848CVV , Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
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DS9034I-PCX+ ,PowerCap with CrystalFEATURES The DS9034PCX PowerCap is designed to be a Provides 10 Years of Battery Backup Power for ..
DS9034PC ,PowerCapDS9034PC/PCIPowerCap
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DP83847ALQA56A
DsPHYTER II
47
YTE
II —
Single
10
/10
rnet
Tra
eivFebruary 2002
DP83847 DsPHYTER II — Single 10/100 Ethernet Transceiver
General DescriptionThe DP83847 is a full feature single Physical Layer device
with integrated PMD sublayers to support both 10BASE-T
and 100BASE-TX Ethernet protocols over Category 3 (10
Mb/s) or Category 5 unshielded twisted pair cables.
The DP83847 is designed for easy implementation of
10/100 Mb/s Ethernet home or office solutions. It interfaces
to Twisted Pair media via an external transformer. This
device interfaces directly to MAC devices through the IEEE
802.3u standard Media Independent Interface (MII) ensur-
ing interoperability between products from different ven-
dors.
The DP83847 utilizes on chip Digital Signal Processing
(DSP) technology and digital Phase Lock Loops (PLLs) for
robust performance under all operating conditions,
enhanced noise immunity, and lower external component
count when compared to analog solutions.
Applications LAN on Motherboard Embedded Applications
System DiagramStatus
10BASE-T
100BASE-TXMII
25 MHz
Typical DsPHYTER II applicationEthernet MAC
Magnet
ics
RJ-45
Clock LEDs
DP8384710/100 Mb/s
DsPHYTER II
Features Low-power 3.3V, 0.18μm CMOS technology Power consumption < 351mW (typical) 5V tolerant I/Os 5V/3.3V MAC interface IEEE 802.3 ENDEC, 10BASE-T transceivers and filters IEEE 802.3u PCS, 100BASE-TX transceivers and filters IEEE 802.3 compliant Auto-Negotiation Output edge rate control eliminates external filtering for
Transmit outputs BaseLine Wander compensation IEEE 802.3u MII (16 pins/port) LED support (Link, Rx, Tx, Duplex, Speed, Collision) Single register access for complete PHY status 10/100 Mb/s packet loopback BIST (Built in Self Test) 56-pin LLP package (9w) x (9l) x (.75h) mm
