DP83257VF ,PLAYERa+⑩ Device (FDDI Physical Layer Controller)Pin Descriptions5.16 Current Noise Count Register (CNCR)5.17 Current Noise Prescale Count Register ..
DP83257VF-MPC ,Player & Device Enhanced FDDI Physical Layer Controller [Preliminary]Features Elasticity Buffer, Repeat Filter, and SmootherYY Line state detector/generatorSingle chip ..
DP83266VF ,MACSITM Device (FDDI Media Access Controller and System Interface)FUNCTIONAL DESCRIPTION (SERVICE ENGINE)2.10 Self Testing6.1 Overview2.11 32-Bit Address/Data Path t ..
DP83266VF-MPC ,MACSI Device (FDDI Media Access Controller and System Interface) [Preliminary]DP83266MACSIDevice(FDDIMediaAccessControllerandSystemInterface)PRELIMINARYOctober1994TMDP83266MACSI ..
DP8344BV ,Biphase Communications Processor-BCPFunctional Description2.1 CPU Architectural Description3.2.1 Transmitter2.1.1 Register Set3.2.2 Rec ..
DP83640TVV ,Precision PHYTERFeatures1Cable• IEEE 1588 V1 and V2 Supported• ESD Protection - 8 kV Human Body Model• UDP/IPv4, UD ..
DS8922M ,TRI-STATE RS-422 Dual Differential Line Drivers and Receiver PairDS8922/DS8922A/DS8923A TRI-STATE RS-422 Dual Differential Line Driver and Receiver PairsJuly 2004®D ..
DS8922MX ,TRI-STATE RS-422 Dual Differential Line Drivers and Receiver PairGeneral Descriptionthe outputs and prevent erroneous glitches on the transmis-The DS8922/22A and DS ..
DS8922N ,TRI-STATE RS-422 Dual Differential Line Drivers and Receiver PairDS8922/DS8922A/DS8923A TRI-STATE RS-422 Dual Differential Line Driver and Receiver PairsJuly 2004®D ..
DS8923AM ,TRI-STATE RS-422 Dual Differential Line Drivers and Receiver PairGeneral Descriptionthe outputs and prevent erroneous glitches on the transmis-The DS8922/22A and DS ..
DS8923AN ,TRI-STATE RS-422 Dual Differential Line Drivers and Receiver PairGeneral Descriptionthe outputs and prevent erroneous glitches on the transmis-The DS8922/22A and DS ..
DS8925M ,LocalTalk⑩ Dual Driver/Triple ReceiverFeaturesn Single chip solution for LocalTalk portThe DS8925 is a dual driver/triple receiver device ..
DP83256VF-DP83256VF-AP-DP83257VF
PLAYERa+⑩ Device (FDDI Physical Layer Controller)
TL/F/11708
DP83256/56-AP/57
PLAYER
Device
(FDDI
Physical
Layer
Controller)
PRELIMINARY
October 1994
DP83256/56-AP/57
PLAYERaTM Device (FDDI Physical Layer Controller)
General Description
The DP83256/56-AP/57 Enhanced Physical Layer Control-
ler (PLAYERa device) implements one complete Physical
Layer (PHY) entityas definedbythe Fiber Distributed Data
Interface (FDDI) ANSI X3T9.5 standard.
The PLAYERa device integrates stateoftheart digital
clock recoveryand improved clock generation functionsto
enhance performance, eliminate external componentsand
remove critical layout requirements.
FDDI Station Management (SMT)is aidedby Link Error
Monitoring support, Noise Event Timer (TNE) support,Op-
tional Auto Scrubbing support,an integrated configuration
switchand built-in functionality designedto removeall strin-
gent response time requirements suchas PCÐReactand
CFÐReact.
Features Single chip FDDI Physical Layer (PHY) solution Integrated Digital Clock Recovery Module providesen-
hanced trackingand greater lock acquisition range Integrated Clock Generation Module providesall neces-
sary clock signalsforan FDDI system froman external
12.5 MHz reference Alternate PMD Interface (DP83256-AP/57) supports
UTP twistedpair FDDI PMDs withno external clockre-
coveryor clock generation functions requiredNo External Filter Components Connection Management (CMT) Support (LEM, TNE,
PCÐReact, CFÐReact, Auto Scrubbing) Full on-chip configuration switch Low Power CMOS-BIPOLAR design usinga single5V
supply Full duplex operation with through parity Separate management interface (Control Bus) Selectable Parityon PHY-MAC Interface and Control
Bus Interface Two levelsof on-chip loopback 4B/5B encoder/decoder Framing logic Elasticity Buffer, Repeat Filter,and Smoother Line state detector/generator Supports single attach stations, dual attach stations
and concentrators withno external logic DP83256for SAS/DAS single path stations DP83257for SAS/DAS single/dual path stations DP83256-APfor SAS/DAS single path stations thatre-
quirethe alternate PMD interface
TL/F/11708–1
FIGURE1-1. FDDI Chip SetOverview
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
BMACTM, BSITM,CDDTM,CDLTM, CRDTM, CYCLONETM, MACSITM,PLAYERTM,PLAYERaTMand TWISTERTM aretrademarksofNational SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
