DP5380V ,Asynchronous SCSI Interface (ASI)PIN DESCRIPTION3.0REGISTER DESCRIPTION4.0DEVICE OPERATION5.0INTERRUPTS6.0RESET CONDITIONS7.0APPLICA ..
DP5380V ,Asynchronous SCSI Interface (ASI)applications canYHigh current outputs drive SCSI bus directlyuse it with no changes to hardware or ..
DP7304BJ ,8 BIT TRI-STATE BIDIRECTIONAL TRANSCEIVERElectrical Characteristics (Notes 2 and 3) (Continued)
Symbol Parameter Conditions Min Typ Max U ..
DP7310J ,DP7310/DP8310/DP7311/DP8311 Octal Latched Peripheral DriversFeaturesYLevel translatorsYHigh current, high voltage open collector outputsYFiber-optic LED driver ..
DP7310J ,DP7310/DP8310/DP7311/DP8311 Octal Latched Peripheral DriversFeaturesYLevel translatorsYHigh current, high voltage open collector outputsYFiber-optic LED driver ..
DP7311J ,DP7310/DP8310/DP7311/DP8311 Octal Latched Peripheral DriversDP7310/DP8310/DP7311/DP8311OctalLatchedPeripheralDriversFebruary1995DP7310/DP8310/DP7311/DP8311Octa ..
DS87C520-QCL+ ,EPROM/ROM High-Speed Microcontrollersfeatures 16 kB of EPROM or Mask ROM with an extra 1 kB of data RAM. Both OTP and windowed packages ..
DS87C520QNL ,EPROM/ROM high-speed micro, 80C52-compatible, 256 bytes scratchpad RAM, 16kB program memory, 1kB extra on-chip SRAM for MOVX, 33 MHzFEATURES PACKAGE OUTLINE § 80C52-compatible - 8051 pin and instruction set compatible - Four 8- ..
DS87C520QNL ,EPROM/ROM high-speed micro, 80C52-compatible, 256 bytes scratchpad RAM, 16kB program memory, 1kB extra on-chip SRAM for MOVX, 33 MHzfeatures of the DS87C520 will apply to the DS83C520, with the exception of EPROM-specific
DS87C520-QNL ,EPROM/ROM high-speed micro, 80C52-compatible, 256 bytes scratchpad RAM, 16kB program memory, 1kB extra on-chip SRAM for MOVX, 33 MHzfeatures where noted. Please contact your local Dallas Semiconductor sales representative for order ..
DS87C520-WCL ,EPROM/ROM high-speed micro, 80C52-compatible, 256 bytes scratchpad RAM, 16kB program memory, 1kB extra on-chip SRAM for MOVX, 33 MHzfeatures where noted. Please contact your local Dallas Semiconductor sales representative for order ..
DS87C520-WCL. ,EPROM/ROM high-speed micro, 80C52-compatible, 256 bytes scratchpad RAM, 16kB program memory, 1kB extra on-chip SRAM for MOVX, 33 MHzFEATURES PACKAGE OUTLINE § 80C52-compatible - 8051 pin and instruction set compatible - Four 8- ..
DP5380N-DP5380V
Asynchronous SCSI Interface (ASI)
TL/F/9756
DP5380
Asynchronous
SCSI
Interface
(ASI)
May 1989
DP5380 Asynchronous SCSI Interface (ASI)
General Description
The DP5380ASIisa CMOS device designedto providea
low cost, high performance Small Computer Systems Inter-
face.It complies withthe ANS X3.131-1986 SCSI standard definedbythe ANSI X3T9.2 committee.It canactas
both INITIATORand TARGET, makingit suitableforany
application.TheASI supports selection, reselection, arbitra-
tionandall otherbus phases. High-current open-drain driv-
erson chip reduce application chip countby interfacingdi-
recttothe SCSI bus.An on-chip oscillator providesalltim-
ing delays.
The DP5380ispinand program compatiblewiththe NMOS
NCR5380 device. NCR5380or AM5380 applicationscan
useit withno changesto hardwareor software. The
DP5380is availableina 40-pinDIPora 44-pin PCC.
TheASIis intendedtobe usedina microprocessor based
application, and achieves maximum performance witha
DMA controller. The deviceis controlledby reading and
writing several internal registers.A standard non-multi-
plexed addressand databus easilyfitsanymP environment.
Data transferscanbe performedby programmed-I/O, pseu-
do-DMAorviaa DMA controller.TheASI easily interfacesa DMA controller using normalor Block Mode. TheASI
canbe usedin eithera polledor interrupt-driven environ-
ment.
Features
SCSI Interface Supports TARGETand INITIATOR roles Parity generation with optional checking Arbitration support Direct control/monitoringofall SCSI signals High current outputs drive SCSIbus directly Fasterand improved timing Verylow SCSIbus loading
mPInterface Memoryor I/O-mapped control transfers Programmed-I/Oor DMA data transfers Normalor Block-mode DMA Fast DMA handshake timing
Connection Diagram
TL/F/9756–1
Tableof Contents
1.0 FUNCTIONAL DESCRIPTION
2.0PIN DESCRIPTION
3.0 REGISTER DESCRIPTION
4.0 DEVICE OPERATION
5.0 INTERRUPTS
6.0 RESET CONDITIONS
7.0 APPLICATION GUIDE
8.0 ABSOLUTE MAXIMUM RATINGS
9.0DC ELECTRICAL CHARACTERISTICS
10.0AC ELECTRICAL CHARACTERISTICS FLOWCHARTS REGISTER CHART
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
PALÉisa registeredtrademark ofandusedunderlicense fromMonolithicMemories,Inc.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
