DM87SR181J ,20 ns, (1024 x 8) 8K-bit registered TTL PROMGeneral Description
The DM77/87SR181 is an electrically programmable
Schottky TTL read-only mem ..
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DM87SR181J
20 ns, (1024 x 8) 8K-bit registered TTL PROM
National
, Semiconductor
DM77/87SR181
(1024 It 8) 8k-Bit Registered TTL PROM
General Description
The DM77/87SR181 is an electrically programmable
Schottky TTL read-only memory with D-type, master-slave
registers on chip. This device is organized as 1024-words by
8-bits and is available in the TRI-STATE8 output version.
Designed to optimize system performance, this device also
substantially reduces the cost and size of pipelined micro-
programmed systems and other designs wherein accessed
PROM data is temporarily stored in a register. The
DM77/87SR181 also offers maximal flexibility for memory
expansion and data bus control by providing both synchro-
nous and asynchronous output enables. All outputs will go
into the "OFF" state if the synchronous chip enable (GS) is
high betore the rising edge of the clock, or if the asynchro-
nous chip enable (G) is held high. The outputs are enabled
when E is brought low before the rising edge of the clock
and G is held low. The E flip-flop is designed to power up
to the "OFF" state with the application of Vcc.
Data is read from the PROM by first applying an address to
inputs AO-M. During the setup time the output of the array
is loaded into the master flip-flop of the data register. During
the rising edge (low to high transition) of the clock, the data
is then transferred to the slave of the flip-flop and will ap-
pear on the output if the output is enabled. Following the
rising edge clock transition the addresses and synchronous
chip enable can be removed and the output data will remain
stable.
The DM77/87SR181 also features an initialize function
W. The initialize function provides the user with an extra
word of programmable memory which is accessed with sin-
gle pin control by applying a low on W. The initialize func-
tion is synchronous and is loaded into the output register on
the next rising edge of the clock. The unprogrammed state
of the W is all lows.
PROMs are shipped from the factory with lows in all loca-
tions. A high may be programmed into any selected location
by following the programming instructions. Once pro-
grammed, it is impossible to go back to a low.
Features
II On-chip, edge-triggered registers
ll Synchronous and asynchronous enables for word ex-
panswn
Programmable register initialize
24-pin, 300 mil package
40 ns address setup and 20 ns clock to output for max-
imum system speed
Highly reliable. titanium tungsten fuses
TRI-STATE outputs
Low voltage TRl-SAFETM programming
All parameters guaranteed over temperature
Block Diagram
A2 " VORD 1 128-8”
" PROGRAMMABLE FUSE ARRAY
1/! 6 HULIIPLEXER
INITIAUZE WORD
B-BIT EDG-TRKXIRED REGISTER
Q7 " 05 DA 03
Pln Names
AO-ASI Addresses
C Clock
G Output Enable
GN D Ground
E Synchronous
Output Enable
INITS Initialize
00-07 Outputs
Vcc Power Supply
TL/D/9195-1
lSLHSLBILZWG
DM77/87SR181
Connection Diagrams
DuaI-In-Llne Package
117- 1. 24 -a
AS- 2 23 1-A8
M- 3 22 -A9
M-- 4 21 -if
A3- 5 20 -.ltttTs
112- 6 19 -trs
Al-- 7 18 -t:
A0- a 17 --07
oo- 9 16 r-oe
tIle 10 15 ~05
02- 11 14 ~04
tmo-' 12 13 -03
TopVIew
TL/D/9195-2
Order Number DM77/87SR181J or DM87SRIBIN
See NS Package Number J24A or N24A
Ordering Information
Commercial Temp Range (tPC to + TtPC)
Parameter/Order Number
DM87SR1810
DM87SR181 N
DM87SR181V
PIastIc Leaded Chip Carrier (PLCC)
ID alt IN C9 m
_ = _ = > _ _
I I I I I I I
4 3 2 1 28 27 26
M-- 5 25 -t5
M- 6 24 bINITS
A2- 7 23 -iis-
AI- 8 22 -c
A0- 9 21 -tlc
NC- 10 20 -tl7
tlo- 11 19 ~06
12 13 1415 16 17 18 _
I I I I I I I
a s g a p, a 3
TL/D/9195-3
TopVIew
Order Number DM87SR181V
See NS Package Number V28A
MIlItary Temp Range (-55t to + 125°C)
Parameter/Order Number
DM77SR181 J , '
Absolute Maximum Ratings (Note1) Operating Conditions
" MllltaryfAerospatte specified devlces are required, Mln Max Units
please contact the National Semiconductor Sales Supply Voltage (Vcc)
offlttefDltttrlttutttrtt for avallablllty and tspate-lotta. Military 4.50 5.50 V
Supply Voltage (Note 2) --0.5V to + 7.0V Commercial 4.75 5.25 V
Input Voltage (Note 2) -1.2V to + 5.5V AW” Temperature (TA) 55 + 125 C
_ l l ary - °
2et vgtage (Ntme 2) 63:1] 'tlt," 5505; Commercial 0 + 70 "C
L Ir,',",'',', 9mg“; "f' 10 d tt 30ty'C Logical "0" Input Voltage 0 0.8 v
ea e'mp. ( o enng, . secon s) Logical "I" Input Voltage 2.0 5.5 V
ESD rating to be determined.
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be permanently damaged. They do not mean that the device may
be operated at those values.
Note 2.. These limits do not apply during programming. For the programming
settings, refer to the programming instructions.
DC Electrical Characteristics (Note1)
Symbol Parameter Condltlons DM77SR181 DM87SR181 Unlts
Mln Typ Max Mln Typ Max
lit. Input Load Current Vcc = Max, VIN = 0.45V -80 -250 -80 -250 ps/k
IIH Input Leakage Current Vcc = Max, l/m = 2.7V 25 25 pA
Vcc = Max,V.N = 5.5V 1.0 1,0 mA
VOL Low Level OutputVoltage Vcc = Min, IOL = 16 mA 0.35 0.50 0.35 0.45 V
" Low Level Input Voltage 0.80 0.80 V
VIH High Level Input Voltage 2.0 2.0 V
Vc InputCIamp Voltage Vcc = Min, IN = -18 mA -0.8 -1.2 -0.8 -1.2.. V
C; InputCapacitance Vcc = 5.0V. VIN = 2.0V
_ TA = 25''C, 1 MHz 4.0 4.0 pF
Co OutputCapacitance Vcc = 5.0V, V0 = 2.0V 6 0 6 0 F
TA = 25'C, 1 MHz, Outputs Off ' . p
ICC Power Supply Current Vcc = Max, Inputs Grounded 1 15 175 1 15 175 m A
All Outputs Open
kos Short Circuit Vo = 0V, Vcc = Max _ - - _
Output Current (Note 2) 20 70 20 70 mA
loz Output Leakage Vcc = Max, Vo = 0.45V to 2.4V - _
(TRI-STATE) Chip Disabled 50 + 50 50 + 50 "A
VOH Output Voltage High IOH = -2.0 mA 2.4 3.2
Iors = - 6.5 mA 2.4 3.2 V
Note It These limits apply over the entire operating range unless otherwise noted. All typieal values are for Vac = 5.0V and TA = 25'C.
Note 2: During los measurement, only one output at a time should be grounded. Permanent damage may otherwise result.
l-SLHSLGILLWG
DM77/87SR181
Switching Characteristics
Symbol Parameter Conditions DM77SR181 DM87SR181 Units
Min Typ Max Mln Typ Max
tS(A) Address to C (High) Setup Time CL = 30 pF 50 20 40 20 ns
tHW Address to C (High) Hold Time 0 - 5 0 - 5 ns
tam) INIT§ to C (High) Setup Time 35 20 30 20 ns
hum) INITS to C (High) Hold Time 0 -5 o -5 ns
tPHL(C) Delay from C (High)
1.3mm to Output (High or Low) 15 30 15 20 ns
tWH(C) C Width (High or Low) 25 1 3 20 1 3 ns
tWL(C)
tag) tts to C (High) Setup Time 15 15 ns
tHers) ‘63 to C (High) Hold Time 5 0 ns
thL(C) Delay from C (High) ck. = 30 pF
tPZH(C) to Active Output (High or Low) 20 30 20 25 ns
tpzua) Delay from G (Low)
tPZH(§) to Active Output (Low or High) 15 30 15 25 ns
tpLz(C) Delay from C (High) CL = 5 pF (Note 1)
tsz((;) to Inactive Output (TRI-STATE) 20 30 20 25 ns
tang) Delay from G (High)
tpHirttT) to Inactive Output (TRI-STATE) 15 30 15 25 ns
Note: All typical values are for Vcc = 5V, TA = 25'C.
Functional Description
TESTABILITY
The Schottky PROM die includes extra rows and columns of
fusable links for testing the programmability of each chip.
These test fuses are placed at the worst-case chip locations
to provide the highest possible confidence in the program-
ming tests in the final product. A ROM pattern is also per-
manently fixed in the additional circuitry and coded to pro-
vide a parity check of input address levels. These and other
test circuits are used to test for correct operation of the row
and column-select circuits and functionality of input and en-
able gates. All test circuits are available at both wafer and
assembled device levels to allow 100% functional and para-
metric testing at every stage of the test flow.
RELIABILITY
As with all National products, the Ti-W PROMs are subject-
ed to an on-going reliability evaluation by the Reliability As-
surance Department. These evaluations employ accelerat-
ed life tests, including dynamic high-temperature operating
life, temperature-humidity life, temperature cycling, and ther-
mal shock. To date, nearly 7.4 million Schottky Ti-W PROM
device hours have been logged, with samples in Epoxy B
molded DIP (N-package), PLCC (V-package) and CERDIP
(J-package). Device performance in all package configura-
tions is excellent.
TlTANlUM-TUNGSTEN FUSES
National's Programmable Read-Only Memories (PROMs)
feature titanium-tungsten (T i-W) fuse links designed to pro-
gram efficiently with only 10.5V applied. The high perform-
ance and reliability of these PROMs are the result of fabrica-
tion by a Schottky bipolar process, of which the titanium-
tungsten metallization is an integral part, and the use of an
on-chip programming circuit.
A major advantage of the titanium-tungsten fuse technology
is the low programming voltage of the fuse links. At 10.5V,
this virtually eliminates the need for guard-ring devices and
wide spacings required for other fuse technologies. Care is
taken, however, to minimize voltage drops across the die
and to reduce parasites. The device is designed to ensure
that worst-case fuse operating current is low enough for
reliable Iong-term operation. The Darlington programming
circuit is liberally designed to insure adequate power density
for blowing the fuse links. The complete circuit design is
optimized to provide high performance over the entire oper-
ating ranges of V60 and temperature.
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM87SR181J - product/dm87sr181j?HQS=T|-nuII-null-dscataIog-df-pf-null-wwe
DM77SR181J - product/dm77sr181j?HQS=T|-null-null-dscatalog-df—pf—nu|I-wwe
DM87SR181V - product/dm87sr181v?HQS=TI—nu||-nulI-dscataIog-df-pf-null-wwe
DM87SR181 N - product/dm87sr181n?HQS=T|-nu|I-nulI-dscatalog-df—pf—nuII-wwe
