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DM8556N
TRI-STATE? Programmable Binary Counters
TL/F/6588
DM7556/DM8556
TRI-STATE
Programmable
Binary
Counters
August 1989
DM7556/DM8556 TRI-STATEÉ Programmable
Binary Counters
General Description
These circuitsare synchronous, edge-sensitive, fully-pro-
grammable 4-bit counters. The counters feature both con-
ventional totem-pole and TRI-STATE outputs; such that
whenthe outputs areinthe high impedance mode, theycan usedto enter data fromthebus lines.In addition,the
clear input operates completely independentofall otherin-
puts. Duringthe programming operation, datais loadedinto
the flip-flopsonthe positive-going edgeofthe clock pulse. facilitate cascadingof these counters,the MAX COUNT
outputcanbetied directlyintothe count enable inputofthe
next counter.
Features Typical clock frequency35 MHz TRI-STATE outputs Fully independent clear Synchronous loading Cascading circuitry provided internally
Connection Diagram
Dual-In-Line Package
TL/F/6588–1
Order Number DM7556Jor DM8556N
SeeNSPackage Number J16Aor N16A
Function Table
ControlInputs I/O Ports Active Outputs
LOAD CE CLK OD Reset I/OA I/OB I/OC I/OD QA QB QC QD X L H L L L L L L L L X H H Z Z Z ZL L L L L L L QA0 QB0 QC0 QD0 QA0 QB0 QC0 QD0 L H L Z Z Z Z QA0 QB0 QC0 QD0 u LL a b c d A B C D u L L COUNT COUNT u H L Z Z Z Z COUNT
TheI/Opins areusedas inputs whenthey areTRI-STATED,and theLOAD inputisLow. Theyare outputs andactive
when LOADinputisHighandODisLow.eHigh Level (Steady State)eLow Level(Steady State)e Don’tCare including transitionsb,c,deThe levelofthe steadystateinputat inputsA,B,C,D respectively
QA0,QB0,QC0,QD0eThelevelof QA,QB,QC,QD respectively, beforethe indicated steadystateinput conditions
were established.
TRI-STATEÉ isaregistered trademarkofthe National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
