DM74S570AJ ,45 ns, (512 x 4) 2048-bit TTL PROMBlock Diagram
MIT ARRAY
M x Q
MEMORV MATRIX
DECDDER
mm
BUFFER ca 02 tll no
TL/D/91B9 ..
DM74S570N ,55 ns, (512 x 4) 2048-bit TTL PROMElectrical Characteristics (Note1)
Symbol Parameter Conditions DM545570 DM74S570 Units
Min Typ Ma ..
DM74S571AJ ,45 ns, (512 x 4) 2048-bit TTL PROMFeatures
I Advanced titanium-tungsten (Ti-W) fuses
I Schottky-clamped for high speed
Address ..
DM74S571AN ,45 ns, (512 x 4) 2048-bit TTL PROMBlock Diagram
20488” ARRAV
M l 32
MEMORY MATRIX
DECODER
ENABLE
BUFFER
00
TL/D/9713- ..
DM74S571J ,55 ns, (512 x 4) 2048-bit TTL PROMGeneral Description
This Schottky memory is organized in the popular 512
words by 4 bits config ..
DM74S571N ,55 ns, (512 x 4) 2048-bit TTL PROMGeneral Description
This Schottky memory is organized in the popular 512
words by 4 bits config ..
DS25BR400TSQ , Quad 2.5 Gbps CML Transceiver with Transmit De-Emphasis and Receive Equalization
DS25BR400TSQ/NOPB ,Quad 2.5 Gbps CML Transceiver withTransmit De-Emphasis and Receive Equalization 60-WQFN -40 to 85Table 1. PIN DESCRIPTIONS (continued)(1)Pin Name Pin Number I/O DescriptionOB_0+ 55 O Inverting and ..
DS25CP152TSQ/NOPB ,3.125 Gbps LVDS 2x2 Crosspoint Switch 16-WQFN -40 to 85FEATURES DESCRIPTIONThe DS25CP152 is a 3.125 Gbps 2x2 LVDS2• DC - 3.125 Gbps Low Jitter, Low Skew, ..
DS25LV02R , Low-Voltage 1024-Bit EPROM
DS25MB100TSQ/NOPB ,2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization 36-WQFN -40 to 85(1)Pin Functions (continued)PIN(2)TYPE DESCRIPTIONNAME NO.DES_0 and DES_1 select the output pre-emp ..
DS26102 ,16-Port TDM-to-ATM PHYBlock Diagram.. 7 Figure 7-1. Polling Phase and Selection Phase at Transmit Interface........18 Fig ..
DM74S570AJ-DM74S570N
60 ns, (512 x 4) 2048-bit TTL PROM
DM543570/DM748570
National
Semiconductor
DM54/74S570
(512 x 4) 2048-Bit TTL PROM
General Description
This Schottky memory is organized in the popular 512
words by 4 bits configuration. A memory enable input is pro-
vided to control the output states. When the device is en-
abled, the outputs represent the contents of the selected
word. When disabled, the 4 outputs go to the "OFF" or high
impedance state.
PROMs are shipped from the factory with lows in all loca-
tions. A high may be programmed into any selected location
by following the programming instructions.
Features
" Advanced titanium-tungsten (Ti-W) fuses
n Schottky-clamped for high speed
Address access down to-uk ns max
Enable access-M ns max
Enable recovery-25 ns max
" PNP inputs for reduced input loading
I: All DC and AC parameters guaranteed over tempera-
" Low voltage TRl-SAFETM programming
I: Open-collector outputs
Block Diagram
Mi - J 20mm ARRAY
M - M M x tt
MEMORY mmx
UEBODEH , ' L
"----_ 1 1 I
AI 3 a "e i a
An: mux - mux ._ mux mux
l l l ,
'- r-tnr-wr-ur-ur
ENABLE I I l l
aurren ca 02 m 00
TL/D/9189-t
Pin Names
AO-A8 Addresses
G Enable
GND Ground f .
00-03 Outputs
VCC Power Supply
Connection Diagrams
Dual-ln-Line Package
M- 1 t6 -a
AS- 2 15 .-A7
M-. 3 14 -M
A3- 4 13 "-e
M- 5 12 -00
A1- 6 11 ~01
M- 7 10 -02
GND- 8 ' -03
TL/D/9189-2
Top View
Order Number DM54/74SS70J, 57OAJ
DM74S570N, 570AN
See NS Package Number J16A or MBA
Ordering Information
Plastic Leaded Chip Carrier (PLCC)
'dl 3 2 g"ct
l l l I l
3 2 1 2019
M-4 18-A8
A3-5 t7-t-t
A0-6 16-00
A1-7 15 -NC
A2-8 " L--o1
9 10111213
I I l I I
E 2 g 8 8‘
TopView
Order Number DM74SS7OV, 570AV
See NS Package Number V20A
Commercial Temp Range (0°C to + 70°C)
Parameter/Order Number
Max Access Time (ns)
DM74S570AN 45
DM74SS70N 55
DM74S570AJ 45
DM74S570d 55
DM74SS70AV 45
DM748570V 55
Military Temp Range (
-55°C to + 125'C)
Parameter/Order Number Max Access Time (ns)
DM54SS70AJ 60
DM548570J 65
TL/D/9189-3
OLSSVLWO/OLSSVSWCI
DM543570/DM748570
Absolute Maximum Ratings (Note1)
Operating Conditions
It Military/Aerospace specified devices are required, Min Max Units
please contact the National Semiconductor Sales Supply Voltage (Vcc)
Office/Distributors for availability and specitioatirms. Military 4.50 5.50 V
Supply Voltage (Note 2) _ 0.5V to + 7.0V Commercial 4.75 5.25 V
Input Voltage (Note 2) - 1.2V to + 5.5V AVFM Temperature (TA) 55 125 C
- i itary - + o
2,t,'lt Village (Ntote 2) "c,l:i'1t/, l"; 20?: Commercial 0 + 70 (
L 17,1' emger‘: "f 10 d o 300°C Logical "o" Input Voltage 0 0.8 V
ea emp. ( o T") secon s) Logical "I '' Input Voltage 2.0 5.5 V
ESD to be determined
Note 1: Absolute Maximum Ratings are those values beyond which the tie
vice may be permanently damaged, They do not mean that the device may
be operated at these values.
Note 2: These limits do not apply during programming. For the programming
ratings, rater to the programming instructions.
DC Electrical Characteristics (Note1)
Symbol Parameter Conditions DM54S570 DM74S570 Units
Min Typ Max Min Typ Max
llL Input Load Current VCC = Max, VIN = 0.45V -80 - 250 -80 - 250 MA
IIH Input Leakage Current Vcc = Max, VIN = 2.7V 25 25 11A
Vcc = Max, VIN = 5.5V 1.0 1.0 mA
VOL Low Level OutputVoltage VCC = Min, lot. = 16 mA 0.35 0.50 0.35 0.45 V
" Low Level Input Voltage 0.80 0.80 V
VIH High Level Input Voltage 2.0 2.0 V
I02 Output Leakage Current Vcc = Max, VCEX = 2.4V 50 50 WA
(Open-CollectorOnly) Vcc = Max, VCEX = 5.5V 100 " . 100 11A
Vc Input Clamp Voltage Vcc = Min, IlN = --18 mA -0.8 - 1.2 -th8 -1,2 V
C. Input Capacitance Vcc = 5.0V, VIN = 2.0V
TA = 25°c,1 MHz 4.0 4.0 pF
Co OutputCapacitance VCC = 5.0V, V0 = 2.0V 6 0 6.0 F
TA = 25''C, 1 MHz, Outputs Off . . p
ICC Power Supply Current Vcc = Max, Input Grounded 90 130 90 130 mA
All Outputs Open
Note 1: These limits apply over the entire operating range unless otherwise noted. All typical values are for Vcc = 5.0V and TA = 25''C.
AC Electrical Characteristics with Standard Load and Operating Conditions
COMMERCIAL TEMP RANGE (0°C to + 70''C)
Symbol JEDEC Symbol Parameter DMMSSN DM74S570A Units
Min Typ Max Min Typ Max
TAA TAVON/ Address Access Time 40 55 30 45 ns
TEA TEVQV Enable Access Time 20 30 15 25 ns
TER TEXQX Enable Recovery Time 20 30 15 25 ns
TZX TEVQX Output Enable Time 20 30 15 25 ns
TXZ TEXQZ Output Disable Time 20 30 15 25 ns
MILITARY TEMP RANGE (-55'C to + 125°C)
Symbol JEDEC Symbol Parameter DM54S570 DM54S570A Units
Min Typ Max Min Typ Max
TAA TAVQV Address Access Time 40 65 30 60 ns
TEA TEVQV Enable Access Time 20 35 15 35 ns
TER TEXQX Enable Recovery Time 20 35 15 35 ns
TZX TEVQX Output Enable Time 20 35 15 35 ns
TXZ TEXQZ Output Disable Time 20 35 15 35 ns
Functional Description
TESTABILITY
The Schottky PROM die includes extra rows and columns of
fusable links for testing the programmability of each chip.
These test fuses are placed at the worst-case chip locations
to provide the highest possible confidence in the program-
ming tests in the final product. A ROM pattern is also per-
manently fixed in the additional circuitry and coded to pro-
vide a parity check of input address levels. These and other
test circuits are used to test for correct operation of the row
and column-select circuits and functionality of input and en-
able gates. All test circuits are available at both wafer and
assembled device levels to allow 100% functional and para-
metric testing at every stage of the test flow.
RELIABILITY
As with all National products, the Ti-W PROMs are subject-
ed to an on-going reliability evaluation by the Reliability As-
surance Department. These evaluations employ accelerat-
ed life tests, including dynamic high-temperature operating
life, temperature-humidity life, temperature cycling, and ther-
mal shock. To date, nearly 7.4 million Schottky Ti-W PROM
device hours have been logged, with samples in Epoxy B
molded DIP (N-package), PLCC (V-package) and CERDIP
(J-package). Device performance in all package configura-
tions is excellent.
TITANIUM-TUNGSTEN FUSES
National's Programmable Read-Only Memories (PHOMs)
feature titanium-tungsten (Ti-W) fuse links designed to pro-
gram efficiently with only 10.5V applied. The high perform-
ance and reliability of these PROMs are the result of fabrica-
tion by a Schottky bipolar process, of which the titanium-
tungsten metallization is an integral part, and the use of an
on-chip programming circuit.
A major advantage of the titanium-tungsten fuse technology
is the low programming voltage of the fuse links. At 10.5V,
this virtually eliminates the need for guard-ring devices and
wide spacings required for other fuse technologies. Care is
taken, however, to minimize voltage drops across the die
and to reduce parasitics. The device is designed to ensure
that worst-case fuse operating current is low enough for
reliable Iong-term operation. The Darlington programming
circuit is liberally designed to insure adequate power density
for blowing the fuse links. The complete circuit design is
optimized to provide high performance over the entire oper-
ating ranges of Vcc and temperature.
OLSSVLWG/OLSSVSWG
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM54S570AJ - product/dm54s570aj?HQS=TI-null-nulI-dscatalog-df-pf—nuII-wwe
DM74S570AJ - productldm743570aj?HQS=T|—nul|-null-dscatalog-df—pf—nuII-wwe
DM74S570AN - product/dm74s570an?HQS=T|-nu|I-nu|I-dscatalog-df—pf—nuII-wwe
DM54S570J - product/dm543570j?HQS=T|-nu|I-nulI—dscatalog-df—pf—nuII-wwe
DM74S570N - product/dm74s570n?HQS=T|-null-nulI-dscatalog-df-pf-null-wwe
DM74S570AV - product/dm743570av?HQS=T|-null-nulI-dscatalog-df-pf-nuII-wwe
DM74S570J - product/dm748570j?HQS=T|—nu|I-nulI-dscatalog-df—pf—nuII-wwe
DM74S570V - product/dm743570v?HQS=T|-nu|I-nuIl-dscatalog-df-pf-nulI-wwe
