DM74S289J ,4.75 V to 5.25 V, 64-bit (16 x 4) open-collector RAM TRI-STATE RAMGeneral Description
These 64-bit active-element memories are monolithic
Schottky-clamped transi ..
DM74S289N ,4.75 V to 5.25 V, 64-bit (16 x 4) open-collector RAM TRI-STATE RAMNational
Semiconductor
DM74S289
64-Bit (16 x 4) Open-Collector RAM TRl-STATE® RAM
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DM74S289J-DM74S289N
4.75 V to 5.25 V, 64-bit (16 x 4) open-collector RAM TRI-STATE RAM
National
i Semiconductor
DM748289
64-Bit (16 x 4) Open-Collector RAM TRI-STATE® RAM
General Description
These 64-bit active-element memories are monolithic
Schottky-clamped transistor-transistor logic (TTL) arrays or-
ganized as 16 words of 4 bits each. They are fully decoded
and feature a chip-enable input to simplify decoding re-
quired to achieve the desired system organization. The
memories feature PNP input transistors that reduce the low
level input current requirement to a maximum of -25 mA,
only one-eighth that of a DM74S standard load factor. The
chip-enable circuitry is implemented with minimal delay
times to compensate for added system decoding.
Write Cycle: The complement of the information at the data
input is written into the selected location when both the
chip-enable input and the read/write input are low. While
the read/write input is low, the outputs are in the high-
impedance state. When a number of the DM748289
outputs are bus connected, this high-impedance state will
neither load nor drive the bus line, but it will allow the bus
line to be driven by another active output or a passive pull-
up if desired,
Read Cycle: The stored information (complement of infor-
mation applied at the data inputs during the write cycle) is
available at the outputs when the read/write input is high
and the chip-enable is low. When the chip-enable is high,
the outputs will be in the high-impedance state.
Features
I: Commercial address access time 25 ns
u Features open-collector output
I: Compatible with most TTL circuits
u Chip-enable input simplifies system decoding
Connection Diagram
Dual-ln-Llne Package
SELECT INPUTS DATA DATA
-"-----, mm" o "TNT t00T 0 MN"
vm r l 4 u "
" " u t3 t2 I It to s
1 z I: I s s 1 a
SELECT cop aun/ DATA OUTPUT DATA OUTPUT GND
mun slum: mm: mm! v1 mm "
TL/Df9693-1
Top View
Order Number DM74S289d or DM748289N
See NS Package Number J16A or N16E
Truth Table
Inputs
Functlon Chlp- Read/ Outbht
Enable Write
gerpljseit of Data) L L High-lmpedance
Read L H Stored Data
Inhibit H X High-Impedance
H = High Level, L = Low Level, X ' Don'tCare
GBZSPLWO
DM745289
Absolute Maximum Ratings (Note 1)
Operating Conditions
It Military/Aerospace speclfled devices are required, Min Max Units
please contact the National Semiconductor Sales Supply Voltage (Vcc)
offlttefDiatrlttutortt for availability and specifications. DM74S289 4.75 5.25 v
Supply Voltage, Vcc 7.0V Temperature (T A)
Input Voltage 5.5V DM748289 o + 70 (
Output Voltage 5.5V
Storage Temperature Range - 65'C to + 150°C
Lead Temperature (Soldering 10 Sec.) + 300°C
DM74S289 Electrical Characteristics
Over recommended operating free-air temperature range unless otherwise noted (Notes 2 and 3)
Symbol Parameter Conditions Min Typ Max Units
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
VOH High Level OutputVoltage Vcc = Min IOH = -6.5 mA 2.4 3.2 V
ICEX High Level Output Current Vcc = Min VOH = 2.4V 40 F A
VoH = 5.5V 100
VOL Low Level OutputVoltage Vcc = Min, lot. = 16 mA 0.45 V
IIH High Level Input Current Vcc = Max, V. = 2.7V 25 pA
ll High Level lnputCurrent Vcc = Max, V. = 5.5V 1.0 m A
at Maximum Voltage
In. Low Level Input Current Vcc = Max, V. == 0.45V -250 ”A
ICC Supply Current (Note 4) Vcc = Max 75 110 mA
VIC InputClamp Voltage Vcc = Min, II = -18 mA _ 1.2 V
cm InputCapacitance Vcc = 5V, VIN = 2V, TA = 25'C, 1 MHz 4.0 pF
Co OutputCapacitance Vcc = 5V, Vo = 2V, " n 6.0 - pF
TA = 25'C, 1 MHz, Output Off
DM748289 Switching Characteristics
Over recommended operating ranges of TA and Vcc unless otherwise noted
DM745289
Symbol Parameter Conditions Typ Units
Min (N at e 2) Max
tAA Access Time from Address CL = 30 pF, 25 35 ns
tCHL 22:23:21?“ 'i).jcillfl2' 12 17 ns
. (Figure 4)
tWHL Enable liye from Sense Recovery Time 12 25 n s
Read/Write from Read/Write
ICLH Disable Time from Chip-Enable 12 20 ns
IWLH Disable Time from Read/Write 13 25 ns
twp Width of Enable Pulse (Read/Write Low) 25 ns
tASW Setup Time (Figure a Address to Read/Write 0 ns
tosw Data to Read/Write 25 ns
tcsw Chip-Enable to Read/Write 0 ns
tAHw Hold Time (Figure 2) Address from Read/Write 0 ns
tDHw Data from Read/Write 0 ns
tCHw Chip-Enable from Read/Write 0 ns
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed Except for "Operating Temperature Range
they are not meant to imply that the devices should be operated at these limits. The table ot ”Electrical Characteristics provides conditions for actual device
operation.
Note 2: Unless otherwise specified min/max limits apply across the - 55'C to + 125'C temperature range for the DM543189 and across the trc to - 7tPC range
tor the DM74S189/289. All typicals are given for Vcc = 5.0V and TA = 25'C.
Note 3: All currents into device pins shown as positive. out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
Note 4: ICC is measured with all inputs grounded, and the outputs open.
DM745289 Switching Time Waveforms
CHIP ENABLE
(NOTE 3)
WAVEFORM 1
(NOTE 1)
ADDRESS
INPUYS
(NOTE 2)
OUTPUT
ADDRESS
INPUTS
INPUTS
CHIP ENABLE
READMRITE
WAVEFOHM 1
(NOTE "
Enable and Disable Tlme from Chlp-Enable
'''"'"'-'y
t---tcttc
Access Time from Address Inputs
w - _./
v'-''-'-'""''"""""''""'""'''"",
Write Cycle
k-tAst-
_------..
"'"'-"''''"-''''""'''t
r-tcsw--
'I'-"-"-'":,
l" treo, "i
FIGURE 2
- Kw,“
Note l.. Waveform 1 is for the output with intamal conditions such that the output is low except when disabled.
Note 2: When measuring delay times from address inputs, the chip-enable is low and the read/write input is high.
Note 3: When measuring delay times from chip-enable input, the address inputs are steady-state and the read/write input is high.
Note 4: Input waveforms are supplied by pulse generators having the following characteristics tr s 2.5 ns, tt S 2.5 ns. PRR s 1 MHz and ZOUT = son.
TL/D/9693-2
TL/D/9693-3
TL/ D/9693-4
SBZS’MWG
DM74S289
Block Diagram
ADDRESS
INPUTS
AC Test Circuit
ADDRESS
" BUFFERS
tl---.
1 OF 16
DECODERS
tW8iT MEMORY
MATRIX
ORGANIZED
cum ENABLE (6E) sd
READMRITE (n/W)
WRITE AND SENSE
AMPLIFIER CONTROL
tu-,',---]
DATA INPUTS 10
OUTPUT
FIGURE 3
7 I 11
Y1 " Y3 "
OUTPUTS
TL/D/9693-6
TL/D/9693- 5
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM74S289N - product/dm745289n?HQS=T|-null-nulI-dscatalog-df-pf-null-wwe
DM74S289J - product/dm745289j?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
