DM74S241N ,Octal 3-STATE Buffer/Line Driver/Line ReceiverFeaturesThese buffers/line drivers are designed to improve both the
DM74S240N-DM74S241N-DM74S244N
Octal 3-STATE Buffer/Line Driver/Line Receiver
DM74S240 • DM74S241 DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver August 1986 Revised May 2000 DM74S240 DM74S241 DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver General Description Features These buffers/line drivers are designed to improve both the3-STATE outputs drive bus lines directly performance and PC board density of 3-STATE buffers/PNP inputs reduce DC loading on bus lines drivers employed as memory-address drivers, clock driv- Hysteresis at data inputs improves noise margins ers, and bus-oriented transmitters/receivers. Featuring 400 Typical I (sink current) 64 mA OL mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout out-Typical I (source current) −15 mA OH puts, and can be used to drive terminated lines down to Typical propagation delay times 133Ω. Inverting 4.5 ns Noninverting 6 ns Typical enable/disable times 9 ns Typical power dissipation (enabled) Inverting 450 mW Noninverting 538 mW Ordering Code: Order Number Package Number Package Description DM74S240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74S241N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74S244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagrams DM74S240N DM74S241N DM74S244N © 2000 DS006478
