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DM74S188ANNSN/a4avai25 ns, (32 x 8) 256-bit TTL PROM
DM74S188NNSN/a10avai35 ns, (32 x 8) 256-bit TTL PROM


DM74S188N ,35 ns, (32 x 8) 256-bit TTL PROMBlock Diagram WIT MIN" 32 x 8 MEMORY MATRIX mm aumn il? Pln Names AO-M m OutputEnab ..
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DM74S189N ,4.75 V to 5.25 V, 64-bit (16 x 4) TRI-STATE RAMFeatures I Schottky-clamped for high speed
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DM74S194N ,7 V, 4-bit bidirectional universal shift registerElectrical Characteristics over recommended operating tree air temperature (unless otherwise noted) ..
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DS2482S-800 ,Eight-Channel 1-Wire MasterAPPLICATIONS PART TEMP RANGE PIN-PACKAGE  Wireless Base Stations DS2482S-800 -40 to +85C 16 SO ( ..
DS2482X-101+T , Single-Channel 1-Wire Master with Sleep Mode
DS2490 ,USB to 1-Wire Bridge Chipblock diagram of the DS2490 is shown in Figure 1. 1-Wire and iButton are registered trademarks of M ..
DS2490S+ ,USB to 1-Wire Bridge Chipblock diagram of the DS2490 is shown in Figure 1. 1-Wire and iButton are registered trademarks of M ..
DS2502 ,1 kbit Add-Only MemoryFEATURES PIN ASSIGNMENT§ 1024 bits Electrically Programmable ReadTO-92NC 1 8 NCOnly Memory (EPROM) ..
DS2502+T&R ,1Kb Add-Only Memoryblock diagram in Figure 1 shows the relationships between the major control and memory sections oft ..


DM74S188AN-DM74S188N
35 ns, (32 x 8) 256-bit TTL PROM
DM54S188/74S188
National
Semiconductor
DM54/74S188
(32 It 8) 256-Bit TTL PROM
General Description
This Schottky memory is organized in the popular 32 words
by 8 bits configuration. A memory enable input is provided
to control the output states. When the device is enabled, the
outputs represent the contents of the selected word. When
disabled, the 8 outputs go to the "OFF" or high impedance
state.
PROMs are shipped from the factory with lows in all loca-
tions. A high may be programmed into any selected location
by following the programming instructions.
Features
" Advanced titanium-tungsten (T i-W) fuses
u Schottky-clamped for high speed
Address access down to-A?5 ns max
Enable access-tlo ns max
Enable "movsry-20 ns max
I: PNP inputs for reduced input loading
II All DC and AC parameters guaranteed over
temperature
It Low voltage TRI-SAFETM programming
" Open-collector outputs
Block Diagram
M - Pln Names
" - l 4 255511 mm AO-M Addresses
A2 - a 32!!!
Al - MEMO!" MATRIX tG Output Enable
GND Ground
IECIM8 L l 1 I l l I
00-07 Outputs ..'
, -., " - - - - -
eur aur " " " " an; ant Vcc Power Supply
mm l l I I i l
sum» tl? us as 04 " 02
TL/D/9187~1
Connection Diagrams
Dual-In-Llne Package
00- t 1s '-r'a:
ol- 2 15 w-i-;
02- 3 14 -"
03- 4 13 -h3
M-- 5 12 --M
05- 6 11 -A1
06-1 7 10 -AO
tmo-- 8 9 -m
TL/D/9187-2
Top View
Order Number DM54/748188J, 188AJ,
DM74$188N or 188AN
See NS Package Number J16A or MBA
Ordering Information
Plastlc Leaded Chip Carrier (PLCC)
- O C9
O O = > I0
I [J l I
3 2 1 20 19
tn-. 4 18 "-A4
03- 5 17 -A3
NC- 6 16 -NC
04- 7 15 I-h2
or- 8 14 -Al
9 10 11 12 13
l I I l l
CD ca C2 N O
CT z z 0 4
TL/D/9187-3
Top View
Order Number DM74S188V or 188AV
See NS Package Number V20A
Commercial Temp Range (0'C to + 70°C)
Parameter/Order Number Max Access Time (ns)
DM74S188N 35
DM74S188J 35
DM74S188V 35
DM74S188AN 25
DM74S188AJ 25
DM74S188AV 25
Mllltary Temp Range t-55'C to + 125°C)
Parameter/Order Number Max Access Tlme (ns)
DM54$188J 45
DM54S188AJ 35
88LSVU88LSV§WG
DM54S188/74S188
Absolute Maximun Ratings (Note1)
Operating Conditions
If Military/Aerospace specllled devices are required, Min Max Unlts
please contact the National Semiconductor Sales Supply Voltage (Vcc)
Office/Distributors for availability and speMtatlons. Military 4.50 5.50 V
Supply Voltage (Note 2) -0.5V to + 7.0V Commercial 4.75 5.25 V
Input Voltage (Note 2) - 1 .2V to + 5.5V Ambient Temperature (T A)
Output Voltage (Note 2) -0.5V to + 5.5V Military - 55 + 125 (
Storage Temperature -65''C to + 15ty'C Commercial 0 + 70 "C
Lead Temp. (Soldering, 10 seconds) 300°C Logical "o" Input Voltage 0 0.8 V
ESD to be determined Logical "I" Input Voltage 2.0 5.5 V
DC Electrical Characteristics (Note 3)
Symbol Parameter Conditions DM54S188 DM74S188 Unlts
Mln Typ Max Min Typ Max
h. Input Load Current Vcc = Max, VIN == 0.45V -80 -250 -80 -250 p.A
IIH Input Leakage Current Vcc = Max, VIN = 2.7V 25 25 M
Vcc = Max.V.N = 5.5V 1.0 1.0 mA
VOL Low Level Output Voltage Vcc = Min, IOL = 16 mA 0.35 0.50 0.35 0.45 V
" (Note 4) Low Level Input Voltage 0.80 0.80 V
VIH (Note 4) High Level Input Voltage 2.0 2.0 V
102 Output Leakage Current Vcc = Max, VCEX = 2.4V 50 50 pA
(Open-CollectorOnly) Vcc = Max, VCEX = 5.5V 100 100 psA
Vc InputClamp Voltage Vcc = Min, IN = -18 mA -0.8 -1.2 -0.8 -1,2 V
ch Input Capacitance VCC = 5.0V. VIN = 2.0V
TA = 25''C, 1 MHz 4.0 4.0 pF
Co OutputCapacitance Vcc = 5.0V. Vo = 2.0V 6.0 6.0 pF
TA = 25°C, 1 MHz, Outputs Off
ICC Power Supply Current Vcc = Max, Input Grounded 70 1 10 70 1 10 m A
All Outputs Open
Note 1: Absolute Maximum Ratings are those values beyond which the device may be permanently damaged. They do not mean that the device may be operated
at these values.
Note 2: These limits do not apply during programming. For the programming ratings, refer to the programming instructions.
Note 3: These limits apply over the entire operating range unless stated otherwise. All typical values are for Voc = 5.0V and TA = 25'C.
Note 4: These are absolute voltages with respect to pin 8 on the device and inctude all overshoots due to system andlor tester noise. Do not attempt to test these
values without suitable equipment,
AC Electrical Characteristics with Standard Load and Operating Conditions
COMMERCIAL TEMP RANGE (tPC to + 70°C)
JEDEC DM74S188 DM745188A
Symbol S b I Parameter Units
wn © Min Typ Max Mln Typ Max
TAA TAVQV Address Access Time 22 35 17 25 ns
TEA TEVQV Enable Access Time 15 20 15 20 ns
TER TEXQX Enable Recovery Time 15 25 15 20 ns
TZX TEVQX Output Enable Time 15 20 15 20 ns
TXZ TEXQZ Output Disable Time 15 25 15 20 ns
AC Electrical Characteristics with Standard Load and Operating Conditions (Continued)
MILITARY TEMP RANGE (- 55°C to + 125''C)
JEDEC DM548188 DM54S188A
Symbol S b l Parameter Units
ym o Mln Typ Max Min Typ Max
TAA TAVQV Address Access Time 22 45 17 35 ns
TEA TEVQV Enable Access Time 1 5 30 15 30 ns
TER TEXQX Enable Recovery Time 1 5 35 15 30 ns
TZX TEVQX Output Enable Time 15 30 15 30 ns
TXZ TEXQZ Output Disable Time 15 35 15 30 ns
Functional Description
TESTABILITY
The Schottky PROM die includes extra rows and columns of
tusable links for testing the programmability of each chip.
These test fuses are placed at the worst-case chip locations
to provide the highest possible confidence in the program:
ming tests in the final product. A ROM pattern is also per-
manently fixed in the additional circuitry and coded to pro-
vide a parity check of input address levels. These and other
test circuits are used to test for correct operation of the row
and coiumn-select circuits and functionality of input and en-
able gates. All test circuits are available at both wafer and
assembled device levels to allow 100% functional and para-
metric testing at every stage of the test flow.
RELIABILITY
As with all National products, the Ti-W PROMs are subject-
ed to an on-going reliability evaluation by the Reliability As-
surance Department. These evaluations employ accelerat-
ed life tests, including dynamic high-temperature operating
lite, temperature-humidity life, temperature cycling, and ther-
mal shock. To date, nearly 7.4 million Schottky Ti-W PROM
device hours have been logged, with samples in Epoxy B
molded DIP (N-package), PLCC (V-package) and CERDIP
(J-package). Device performance in all package configura-
tions is excellent,
TITANIUM-TUNGSTEN FUSES
National's Programmable Read-Only Memories (PROMs)
feature titanium-tungsten (Ti-W) fuse links designed to pro-
gram efficiently with only 10.5V applied. The high perform-
ance and reliability of these PROMS are the result of fabrica-
tion by a Schottky bipolar process, of which the titanium-
tungsten metallization is an integral part, and the use of an
on-chip programming circuit.
A major advantage of the titanium-tungsten fuse technology
is the low programming voltage of the fuse links. At 10.5V,
this virtually eliminates the need for guard-ring devices and
wide spacings required for other fuse technologies. Care is
taken, however, to minimize voltage drops across the die
and to reduce parasites. The device is designed to ensure
that worst-case fuse operating current is low enoygh for
reliable long-term operation. The Darlington programming
circuit is liberally designed to insure adequate power density
for blowing the fuse links. The complete circuit design is
optimized to provide high pedormance over the entire oper-
ating ranges of Vcc and temperature.
BSLSWJBBLSVSWG
This datasheet has been :
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Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM54S188AJ - product/dm54s188a]?HQS=TI-null-nulI-dscatalog-df-pf—nuII-wwe
DM54S188J - product/dm54s188]?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM74S188V - product/dm74s188v?HQS=T|-nu|I-nuIl-dscatalog-df-pf-nulI-wwe
DM74S188AV - product/dm74s188av?HQS=T|—null-nulI-dscatalog-df-pf-nuII-wwe
DM74S188N - product/dm74s188n?HQS=T|-null-nulI-dscatalog-df-pf-null-wwe
DM74S188J - product/dm74s188]?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM74S188AJ - product/dm74s188a]?HQS=T|—nulI-null-dscatalog-df—pf—nuII-wwe
DM74S188AN - product/dm74s188an?HQS=T|-nu|I-null-dscatalog-df—pf-nuII-wwe
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