DM74S161N ,Synchronous 4-Bit Binary CountersFeatures
I Synchronously programmable
I Internal Iook-ahead for fast counting
I Carry output ..
DM74S161N ,Synchronous 4-Bit Binary Countersapplications without additional
gating. Instrumental in accomplishing this function are two
count ..
DM74S163N ,Synchronous 4-Bit Binary CountersGeneral Description
These synchronous, presettable counters feature an inter-
nal carry look-ah ..
DM74S174N ,Hex/Quad D Flip-Flop with ClearGeneral Description
These positive-edge-trig-d flip-flops utilize TTL circuitry
to implement D- ..
DM74S175N ,Hex/Quad D Flip-Flop with ClearApplications include:
Butter/storage registers
Shift registers
Pattern generators
I Typical c ..
DM74S181N ,7 V, arithmetic logic unit/function generatorapplications data for the
DM54S182/DM748182. (Continued)
Connection Diagram Pin Designations
Dua ..
DS2480B ,Serial 1-Wire Line Driver with Load Sensorblock diagram (see Figure 1). The device gets its input data from the serial communication port of ..
DS2480B ,Serial 1-Wire Line Driver with Load SensorPIN DESCRIPTION (default), 19.2kbps, 57.6kbps, and 115.2kbps GND - Ground o Self-Calibrating Ti ..
DS2480B+ ,Serial to 1-Wire Line DriverPIN DESCRIPTION (default), 19.2kbps, 57.6kbps, and 115.2kbps GND - Ground o Self-Calibrating Ti ..
DS2480B+T , Serial to 1-Wire Line Driver
DS2480S ,Serial 1-Wire Line DriverPIN DESCRIPTIONPIN SYMBOL DESCRIPTION1 GND Ground Pin: common ground reference and ground return fo ..
DS2480S ,Serial 1-Wire Line DriverPIN DESCRIPTIONpull–up for Crypto iButton, sensors and EEPROM GND Ground1–W 1–Wire Input/Output• Se ..
DM74S161N-DM74S163N
7 V, sunchronous 4-bit binary counter
National .
Semiconductor
DlVl54S161/DM74S161, DM54S163/DM74S163
Synchronous 4-Bit Binary Counters
General Description
These synchronous, presettable counters feature an inter-
nal carry look-ahead for application in high-speed counting
designs. They are 4-bit binary counters. The carry output is
decoded by means of a NOR gate, thus preventing spikes
during the normal counting mode of operation. Synchronous
operation is provided by having all flip-flops clocked simulta-
neously so that the outputs change coincident wlth each
other when so instructed by the count enable inputs and
internal gating. This mode of operation eliminates the output
counting spikes which are normally associated with asyn-
chronous (ripple clock) counters. A buffered clock input trig-
gers the four tlip-flops on the rising (positive-going) edge of
the clock input waveform.
These counters are fully programmable; that is, the outputs
may be preset to either level. As presetting is synchronous,
setting up a low level at the load input disables the counter
and causes the outputs to agree with the setup data after
the next clock pulse regardless of the levels of the enable
input.
The carry look-ahead circuitry provides for cascading coun-
ters for n-bit synchronous applications without additional
gating. Instrumental in accomplishing this function are two
count-enable inputs and a ripple carry output. Both count-
enable inputs (P and T) must be high to count, and input T is
fed forward to enable the ripple carry output. The ripple car-
ty output thus enabled will produce a high-level output pulse
with a duration approximately equal to the high-Iavel portion
of the QA output. This high-Ievel twerflow ripple carry pulse
can be used to enable successive cascaded stages.
Features
a Synchronously programmable
n Internal look-ahead for fast counting
a Carry output tor n-bit cascading
ll Synchronous counting
I: Load control line
I: Diode-clamped inputs
Connectlon Diagram
DuaI-ln-Llno Package
CARRY ENABLE
Yee OUTPUT QA an At on T LOAD
'16 " " " " " 10 "
11 2 3 4 ti e r la
CLEAR CLOCK A a c tt sum: cm
TL/F/6471-1
Order Number DM54S161J, DM54S163J, DM545161W,
DM74S161N, or DM745163N
See NS Package Number J16A, N16E or W16A
SSLSOLQlS
Absolute Maximum Ratings (Note)
It Military/Aerospaoe specltled devlces are requlred,
please contact the National Semiconductor Sales
OttlcelDlatrlbutors for avallablllty and aptttrmtrtttlontt.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range
DM54S - 55'C to + 125°C
DM74S 0''C to + 70°C
Storage Temperature Range - 65''C to + 150°C
Note: The "Absolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these timits. The
parametric values defined in the ''Eletrttittal Charairistkts"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define
the tttmdititms for actual device operation.
Recommended Operating Conditions See Section 1 for Test Waveforms and Output Load
Symbol Parameter DM548161/163 DM74S161/163 Units
Mln Nom Max Min Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
Vm High Level Input Voltage 2 2 V
" Low Level Input Voltage 0.8 0.8 V
10H High Level Output Current -1 -I mA
'01. Low Level Output Current 20 20 mA
fCLK Clock Frequency (Note 1) o 4O 40 MHz
Clock Frequency (Note 2) 35 35
tw Pulse Width (Note 1) Clock 10 10
Clear (Note 4) 10 10 ns
Pulse Width (Note 2) Clock 12 12
Clear (Note 4) 12 12
tsu Setup Time (Note 1) Data 4 4
Enable P or T 12 12
Load 14 14
Ciear (Note 3) 14 14 ns
Setup Time (Note 2) Data 5 5
Enable P or T 14 14
Load 1 6 1 6
Clear (Note 3) 16 16
tH Hold Time (Note 1) Data 3
Others 0 ns
Hold Time (Note 2) Data 5 5
Others 2
‘REL Load or Clear Release Time (Note 1) 12 12 ns
Load or Clear Release Time (Note 2) 14 14
TA Free Air Operating Temperature - 55 125 0 70 "C
Note l.. Ct. - 15 pF, HL = 2800. TA = 25'C and Vcc = 5V.
Note 2: CL - 50 pF, Rt. = 2800. TA - 25'C and Vcc n 5V.
Note 3: Applies only to the 'S163 which has synchronous clear Inputs.
Note 4: Applies onty to the 's161 which has asynchronous clear inputs.
Electrical Characteristics over recommended operating free air temperature (unless otherwise noted)
Symbol Parameter Conditions Mln Typ Max Units
(Note 1)
V. lnputClamp Voltage Vcc = Min, I. = --18 mA -t.2 V
VOH High Level Output VCC = Min DM54
2.5 3.4
Voltage IOH = Max V
" == Max DM74
" == Min 2.7 3.4
VOL Low Level Output Vcc = Min, IOL = Max 0 5 V
Voltage " = Min,V.L = Max '
l. InputCurrent © Max Vcc = Max, VI = 5.5V
Input Voltage
IIH Low Level Input Vcc = Max CLK, Data 50 A
Current VI = 2.7V Others - 10 -200 H
IIL Low Level Input Vcc = Max Enable T -4 A
Current V; - 0.5V Others -2
los Short Circuit Vcc = Max DM54 -40 -100
Out ut Current (Note 2) mA
p DM74 -40 -100
ICC Supply Current VCC = Max 95 160 mA
SQLSOLQLS
Switching Characteristics atvcc = 5V and TA = 25''C (See Section 1 for TestWaveforms and Output Load)
RL = 2800
From (Input) _ -
Symbol Parameter To (Output) CL - 15 pF CL - 50 pF Unlts
Mln Max Mln Max
{MAX Maximum Clock Frequency 40 35 MHz
tPLH Propagation Delay Time Clock to 25 25 ns
Low to High Level Output Ripple Carry
tPHL Propagation Delay Time Clock to 25 28 ns
High to Low Level Output Ripple Carry
tPLH Propagation Delay Time Clock to 1 5 1 5 ns
Low to High Level Output Any C
tPHL Propagation Delay Time Clock to 1 5 1 8 ns
High to Low Level Output Any Q
tpLH Propagation Delay Time Enable T to 1 5 1 8 ns
Low to High Level Output Ripple Carry
tPHL Propagation Delay Time Enable T to 1 5 1 8 ns
High to Low Level Output Ripple Carry
tpHL Propagation Delay Time Clear to 20 24 ns
High to Low Level Output (Note 3) Any tl
Note 1: All typica1s ate at Voc = w, TA = 25'0.
Note 2: Not more than one output should be shorted at a time. and the duration should not exceed one second.
Note & Propagation delay for clearing is measured from Clea! input for the 'S161 and from the clock input transition for the 'S163.
Logic Diagram
5161,8163
t 3) DATA
(2) CLOCK
iol DATA
(1) CLEAR
t81 DATA
(9) LOAD
tn ENABLE .
[10) ENABLE?
"ME (15)
A s ISI oplnon
TL/F/647t-2
Timing Diagram
S161, S163 Synchronous Binary Counters
Typlcal Clear, Preset. Count and lnhlblt Sequences
MM mvucnnonuusn
Ylll L.-.) lsvncunououm
LOAD I I
A tr"--""''-"'"""''''-""""""'"''''"'""'-
a r-'""'-"'"""-''""''"-''''"""--"'-'-"-"'"''-"'"'''"
um: --- -.---.-----q-r-----q--.
mruts 'T--""-""--""''''''""'-'----"""'"'---""""'""
tcl L-.--.-----------.
tcl L--.-.----..-.---.,....---.
tluEtt---
8161 '""ur"LrVLrLrLrLrLru"1..rLrLr"
ma LrLVLrLrLrLrLrLr1.rLr1.ru-
emmu I I""""-""'
ENABLET I -l
m: T..: " -n, I-I I-I
oumns - -
tte - - -, l
ttrsr.'iyC.= 1
mm: CARRY I I
oumr u " u " n I 2
COUNT t INHIBIT
CLEAR PBESET
TL/F/6471-3
SSISOLQLS
Parameter Measurement Information
Switching Time Waveforms
K-lwtcmcxi
crook a n l N
INPUT i Vasr VREF VBEF Van
bu: - - Mu.
(MEASURE AT trod f-- (MEASURE AT m)
oumn / N
tia _/VIEF VREF
VOL“ te '--
"L ttu,
(MEASURE Arts.) -e (MEASURE AT 1,”)
00TNT Yor,
th, VNEK VREF
VOL tet: =
(MEAsunE AT t...“ - *4 (MEASURE AT rm.)
OUTPUT
VREF V'REF
DL (MEASURE AT m *1 teu,
on 1...“) mow}; - MEASURE AT ‘M’
OUTPUT v
th, REF
VOL t---
(MEASURE " ‘nna
mm: Ito, on 1.....Huute a)
tt0TNT VOL F-------
TL/F/6471-4
Not. A: The Input pulses are supplled by generators having the following ttharattttm'stics: PRR s 1 MHz, duty cycle s; 50%, Zour = 500. For 3161/163,
k s 2.5 ns. t, S 2.5 ns. Vary PRR to measure tMAX.
Not. B.. Outputs thy and carry are tested at tn + 16 for S161, 8163 where tn is the tht time when all outputs are low.
No" C: VREF =" 1.5V.
CLOCK INPUT
DATA INPUTS
A, B, C, AND D
tt OUTPUTS
ENABLE P 0R
ENABLE T
CLOCK INPUT
tt 0 UTPUTS
Switching Time Waveforms
Van VREF
lmcLocx)
3.tlil
VREF Vnu
tw mun
3.01t SEN)?
Vnzs Vat:
VREF Van
TL/FlS471-5
Note A: The input pulses are supplied by generators having the following chitrarrttyristietp.PRR s 1 MHz, duty cycle g 50%, ZOUT = son. tr 3 2.5 ns, t. s 2.5 ns.
Vary PRR to measure ate.
Nola B: Enable P and enable T setup times are measured at tn + th
Note Cr VREF - 1.5V.
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
DM74S161 N - product/dm74s161n?HQS=T|-null-nulI-dscatalog-df-pf-null-wwe
DM54S163J - product/dm54s163]?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM54S161J - product/dm54s161j?HQS=T|—nu|I-nulI-dscatalog-df—pf—nuII-wwe
DM74S163N - product/dm74s163n?HQS=T|-nuII-nulI-dscatalog-df—pf—nuII-wwe
DM54S161W - product/dm54s161w?HQS=T|-nu|I-nulI-dscatalog-df-pf-null-wwe
