DM74LS491AN ,7 V, 10-bit counterNational
Semiconductor
DM54LS491A/DM74LS491A
10-Bit Counter
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DM74LS491AN
7 V, 10-bit counter
National
Semiconductor
DM54LS491A/DM74LS491A
10-Bit Counter
General Description Features
The ten-bit counter can count up, count down, set, and load ll CRT vertical and horizontal timing generation
2 LSB's, 2 MSB's and 6 middle bits high or low as a group. a Bus-structured pinout
All operations are synchronous with the clock. SET over- a Low current PNP inputs reduce loading
rides LOAD, COUNT and HOLD. LOAD overrides COUNT. u TRI-STATE' outputs
COUNT is conditional on Cm, otherwise it holds. n 24-pin SKINNYDIP saves space
All outputs are enabled when OE is low, otherwise HIGH-Z.
The 24 mA lOL outputs are suitable for driving RAM/PROM
address lines in video graphics systems.
Connection Diagram
Top View
vcc’ao m ll? as m us as m as us‘ut
" " " 212019181715 1514_13
t10t11tlgtl3tutl50607tl8ttg
10-BIT
L CK COUNTER DE
00 0102-0703 IN Ul CNT UP SET C.
1''4s'l'l'l''ol11l"
ex no BI 92-01 nu n9 tr an HP SET la END
TL/LM0222-1
Order Number DM54LS491AJ, DM74LS491AJ, DM74LS491AN or DM74LS491AV
See NS Package Number J24F, N240 or V28A
Function Table
W CK SET LD NT Cm cm 09-00 09-00 Operation
H X X X X X X X Z Hi-Z
L t H X X X X X H Set all HIGH
L t L L X X X D D LOAD D
L t L H H X X X 0 HOLD
L T L H L H X X 0 HOLD
L t L H L L L X 0 Plus 1 Count Up
L t L H L L H X Q Minus 1 Count Down
VLSVS‘I
LS491A
Absolute Maximum Ratings (Note1)
If Mllltary/Aerospace apettltled devlces are required, ESD Tolerance >1000V
please contact the National Semlconductor Sales Czap = 100 pF
OfflcelDlstrlbutors for availability and speclflcatlons. Rzap = 1500f1
Supply Voltage, VCC 71/ Test Methold: Human Body Model
Input Voltage 5.5V Test Specification: NSC SOP 5-028
Off-State Output Voltage 5.5V
Storage Temperature -65'C to + 150°C
Recommended Operating Conditions
Symbol Parameter Mllltary Commerclal Units
Min Typ Max Mln Typ Max
Va: Supply Voltage 4,5 5 5.5 4.75 5 5.25 V
TA Operating Free-Air Temperature - 55 25 0 25 75 'C
To Operating Case Temperature 125 "C
Electrical Characteristics Series 24A Over Recommended Operating Temperature Range
Symbol Parameter Conditions Mln Typ Max Unlts
" High Level Input Voltage (Note 2) 2 V
" Low Level Input Voltage (Note 2) 0.8 V
Vc lnputCIamp Voltage Vcc = Min, II = --18 mA -0.8 -1.5 V
VOH High Level OutputVoItage Vcc = Min 10H == -2 mA MIL
VIH = 2V
VOL Low Level Output Voltage Vcc = Min lor. == 12 mA MIL
" = 0.8V kx == 24 mA COM 0,3 0.5 V
" = 2V
IOZH Off-State OutputCurrent Voc = Max Vo = 2.4V 100 pA
IOZL (Note 3) " = 0.8V vo = 0.4V -100 PA
VIH = 2V
1. MaximumlnputCurrent Vcc = Max, VI = 5.5V 1 mA
IIH High Level Input Current Vcc = Max, V. = 2.4V 25 p,A
(Note 3)
IIL Low Level Input Current Vcc = Max, VI == 0.4V -0.04 --0.25 mA
(Note 3)
log Outut Short-Circuit Current Vcc = 5V Vo TW. 0V (Note 4) -30 --70 --130 mA
lcc Supply Current V00 == Max 135 180 mA
Note 1: Absolute maximum ratings are those values beyond which the device may be permanently damaged. They do not mean that the device may be operated at
these values
Note 2: These are absolute voltages with respect to the ground pin on the device and include all overshoots due to system and/or taster noise. Do not attempt to
test these values without suitable equipment.
Note 3: I/O leakage as the worst case of IOZX or IIX, 9.9.. ML and IOZL.
Note 4: During Kas measurement. only one output at a time should be grounded. Permanent damage otherwise may result.
Switching Characteristics Over Recommended Operating Conditions
Symbol Parameter Test Condition Military Commerclal Unlts
Mln Typ Max Mln Typ Max
ts Setup Time from Input 40 2O 30 20 ns
tw Width of Clock High 20 7 15 7 ns
Low 35 15 25 15 ns
tH Hold Time o - 1 5 0 - 15 ns
tCLK Clock to Output CL = 50 pF 10 25 10 15 ns
tpzx Output Enable Delay CL = 50 pF 19 35 19 30 ns
tpxz Output Disable Delay Ct. == 5 pF 15 35 15 30 ns
fMAx Maximum Frequency 15.3 32 22.2 32 MHz
Test Load Schematic of Inputs and Outputs
MIL COM'L
" -11'-n Rt = 390 m = 200 m. e Eumvaum mm "numumn o Ucc
fy, R2 = 750 R2 = 390 fr nu mm ' too am:
om-ar-i-,
CL 5112 --
T L mm --
TLny10222-2 Wm"
TL/L/10222-3
Test Waveforms
Set-up and Hold Pulse Wldth
" NIGH-LEVEL
CLOtX d Yr itEE um: A) ms: 1 " "
INPUT I / IW .--th _
lstmv - loo w "tels", W
mm W llt
mm! N ill) TLn(0222-5
TL/L/10222-4
Note A: " = 1.5V.
Note B: CL includes probe and jig capacitance.
Note B: In the examples above, the phase relationships between inputs and
outputs have been chosen arbitrarily.
Enable and Disable
ENABLE l "
[EMILE PIN on INN!) 9m l
mnmLLv Hum m, ' 0 "
oumn l'trt ‘H w - 'sc
lst oven) 1 Lu
uomuu um I m m +
oumn -
m cmssm h 11‘ _ __ _° "
TL/L/10222-6
VLGVS'I
LS491 A
Logic Diagram
1o-Blt Up/Down Counter
TL/LM0222-7
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
DM74LS491AJ - product/dm74ls491aj?HQS=T|-nu|I-null-dscatalog-df-pf-null-wwe
DM54LS491AJ - product/dm54ls491aj?HQS=T|-nu|l-nul|-dscatalog-df—pf—null-wwe
DM74LS491AN - product/dm74ls491an?HQS=T|-nu|I-nulI-dscatalog-df-pf-nuII-wwe
DM74LS491AV - product/dm74ls491av?HQS=T|-nu|l-nuIl-dscatalog-df—pf—nuII-wwe
