DM74LS38M ,Quad 2-Input NAND Buffer with Open-Collector OutputsDM74LS38 Quad 2-Input NAND Buffer with Open-Collector OutputsAugust 1986Revised March 2000DM74LS38Q ..
DM74LS38M ,Quad 2-Input NAND Buffer with Open-Collector OutputsGeneral Description Pull-Up Resistor EquationsThis device contains four independent gates, each of ..
DM74LS38M ,Quad 2-Input NAND Buffer with Open-Collector OutputsGeneral Description Pull-Up Resistor EquationsThis device contains four independent gates, each of ..
DM74LS38N ,Quad 2-Input NAND Buffer with Open-Collector OutputsGeneral Description Pull-Up Resistor EquationsThis device contains four independent gates, each of ..
DM74LS390 ,Dual 4-Bit Decade CounterFeaturesEach of these monolithic circuits contains eight master- Dual version of the popular DM74L ..
DM74LS390N ,7 V, dual 4-bit decade counterFeatures
I Dual version of the popular 1S90
I 'LS390 ... individual clocks for A and B flip-flo ..
DS2404 ,EconoRAM Time Chippin description and “Power Control” section.) BATO10 V Battery operate input pin for 2.8V to 5.5V o ..
DS2404-001 ,EconoRAM Time Chippin description and “Power Control” section.)BATO10 V Battery operate input pin for 2.8 to 5.5 volt ..
DS2404B ,EconoRAM Time ChipFEATURES PIN ASSIGNMENT§ 4096 bits of nonvolatile dual-port memoryVCC 1 16 VCCincluding real time c ..
DS2404S ,EconoRAM Time ChipPIN DESCRIPTION§ 256-bit scratchpad with strict read/writeV – 2.8 to 5.5 VoltsCCprotocols ensures ..
DS2404S-001 ,EconoRAM Time Chippin description and “Power Control” section.) BATO10 V Battery operate input pin for 2.8V to 5.5V o ..
DS2405 ,Addressable SwitchFEATURES PIN ASSIGNMENT TSOC PACKAGE Open-drain PIO pin is controlled byTO-92match ..
DM74LS38M-DM74LS38N
Quad 2-Input NAND Buffer with Open-Collector Outputs
DM74LS38 Quad 2-Input NAND Buffer with Open-Collector Outputs August 1986 Revised March 2000 DM74LS38 Quad 2-Input NAND Buffer with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates, each of which performs the logic NAND function. The open-collector out- puts require external pull-up resistors for proper logical operation. Where: N (I ) = total maximum output high current 1 OH for all outputs tied to pull-up resistor N (I ) = total maximum input high current for 2 IH all inputs tied to pull-up resistor N (I ) = total maximum input low current for 3 IL all inputs tied to pull-up resistor Ordering Code: Order Number Package Number Package Description DM74LS38M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow DM74LS38SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS38N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = AB Inputs Output AB Y LL H LH H HL H HH L H = HIGH Logic Level L = LOW Logic Level © 2000 DS006363
