DM74LS367AN ,Hex 3-STATE Buffer/Bus DriverGeneral DescriptionThis device contains six independent gates each of whichperforms a non-inverting ..
DM74LS368AM ,Hex TRI-STATE Inverting BuffersFeatureswithout external resistors. When disabled, both the outputYAlternate Military/Aerospace dev ..
DM74LS368AN ,Hex TRI-STATE Inverting Buffers54LS368A/DM54LS368A/DM74LS368AHexTRI-STATEInvertingBuffersMay198954LS368A/DM54LS368A/DM74LS368AHexT ..
DM74LS373 ,Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
DM74LS373N ,3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-FlopsFeaturesYChoice of 8 latches or 8 D-type flip-flops in a singleThese8-bitregistersfeaturetotem-pole ..
DM74LS373SJ ,3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-FlopsDM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-FlopsApril 1 ..
DS2401 ,Silicon Serial NumberPIN DESCRIPTION16.3kbits/sTO-92/SOT-223 TSOC TO-92 Tape & Reel version with leads bentPin 1 Ground ..
DS2401+ ,Silicon Serial NumberPIN DESCRIPTION16.3kbits/sTO-92/SOT-223 TSOC TO-92 Tape & Reel version with leads bentPin 1 Ground ..
DS2401+T ,Silicon Serial NumberDS2401Silicon Serial Numberwww.dalsemi.com
DS2401AX1-03B-00 ,Silicon Serial NumberDS2401Silicon Serial Number
DS2401P ,Silicon Serial NumberFEATURES PIN ASSIGNMENT TSOC PACKAGE§ Upgrade and drop-in replacement forTO-92DS2400DALLAS- ..
DS2401P/T&R ,Silicon Serial NumberFEATURES PIN ASSIGNMENT Upgrade and drop-in replacement for DS2400TO-92TSOC PACKAGE— Extended 2.8 ..
DM74LS367AN
Hex 3-STATE Buffer/Bus Driver
DM74LS367A Hex 3-STATE Buffer/Bus Driver August 1986 Revised March 2000 DM74LS367A Hex 3-STATE Buffer/Bus Driver General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned OFF presenting a high-imped- ance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possi- bility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs. Ordering Code: Order Number Package Number Package Description DM74LS367AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS367AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = A Inputs Output AG Y LL L HL H X H Hi-Z H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE (Outputs are disabled) © 2000 DS006429
