DM74LS298N ,Quad 2-Port Register Multiplexer with StorageFeaturesThe DM74LS298 is a quad 2-port register. It is the logical Select from two data sourcesequ ..
DM74LS298N ,Quad 2-Port Register Multiplexer with StorageFunctional DescriptionThis device is a high speed quad 2-port register. It selects four bits of dat ..
DM74LS299N ,8-Input Universal Shift/Storage Register with Common Parallel I/O Pins
DM74LS30N ,8-Input NAND GateGeneral DescriptionThis device contains a single gate which performs the logicNAND function. Orderi ..
DM74LS323N ,8-Bit Universal Shift/Storage Register with Synchronous Reset and Common I/O Pinsapplicationsparallel load. All modes are activated on the LOW-to-HIGHtransition of the Clock.Connec ..
DM74LS32M ,Quad 2-Input OR GatesGeneral DescriptionThis device contains four independent gates each of whichperforms the logic OR f ..
DS2224 ,32朾it serial number (ROM), 224朾it SRAMDS2223/DS2224DS2223/DS2224EconoRAM
DS2227-100 ,Flexible NV SRAM StikFEATURES PIN ASSIGNMENT Flexibly organized as 128k x 32, 256k x 16,or 512k x 8 bits Data retentio ..
DS2227-120 ,Flexible NV SRAM Stikapplications data integrity is paramount. TheDS2227 provides two batteries for each SRAM and an int ..
DS2250-32-16 ,Soft Microcontroller ModuleFEATURES The DS2250(T) soft microcontroller module is a 8-Bit 8051-Compatible Microcontroller ful ..
DS2250-64-16 ,Soft Microcontroller Moduleelectrical specifications. ORDERING INFORMATION PART RAM SIZE (kB) MAX CRYSTAL SPEED (MHz) TIMEKEEP ..
DS2250T-32-16 ,Soft Microcontroller ModuleBLOCK DIAGRAM Figure 1 2 of 18 Downloaded from: http://www.ic-phoenix.com/stock/DS2250(T)
DM74LS298N
Quad 2-Port Register Multiplexer with Storage
DM74LS298 Quad 2-Port Register Multiplexer with Storage October 1988 Revised March 2000 DM74LS298 Quad 2-Port Register Multiplexer with Storage General Description Features The DM74LS298 is a quad 2-port register. It is the logical � Select from two data sources equivalent of a quad 2-input multiplexer followed by a quad � Fully edge-triggered operation 4-bit edge-triggered register. A Common Select input � Typical power dissipation of 65 mW selects between two 4-bit input ports (data sources). The selected data is transferred to the output register synchro- nous with the HIGH-to-LOW transition of the Clock input. Ordering Code: Order Number Package Number Package Description DM74LS298N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Logic Symbol Connection Diagram V = Pin 16 CC GND = Pin 8 Pin Descriptions Truth Table Inputs Output Pin Names Description SI0 I1 Q S Common Select Inputs x x x CP Clock Pulse Input (Active Falling Edge) ll X L I0 , I0 Source 0 Data Inputs a d lh X H I1 , I1 Source 1 Data Inputs a d hX l L Q , Q Flip-Flip Outputs a d hX h H l = LOW Voltage Level one setup time prior to the HIGH-to-LOW clock transition. h = HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock transition. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 2000 DS009826
