DM74LS253N ,TRI-STATE Data Selectors/Multiplexers54LS253/DM54LS253/DM74LS253TRI-STATEDataSelectors/MultiplexersJune198954LS253/DM54LS253/DM74LS253TR ..
DM74LS253N ,TRI-STATE Data Selectors/MultiplexersFeaturesEach of these Schottky-clamped data selectors/multiplex- ■ 3-STATE version of DM74LS153 wit ..
DM74LS256N ,Dual 4-Bit Addressable LatchFeaturesYWhen the Enable (E) is HIGH and the Clear input (CL)isSerial-to-parallel capabilityLOW, al ..
DM74LS257BM ,3-STATE Quad 2-Data Selectors/Multiplexers54LS257A/DM54LS257B/DM74LS257B,54LS258A/DM54LS258B/DM74LS258BTRI-STATEQuad2-DataSelectors/Multiplex ..
DM74LS257BMX , 3-STATE Quad 2-Data Selector/MultiplexerFeaturesdata lines of bus-organized systems. With all but one of thecommon outputs disabled (at a h ..
DM74LS257BN ,TRI-STATE Quad 2-Data Selectors/MultiplexersGeneral Descriptionisters for data retention throughout the system.These Schottky-clamped high-perf ..
DS21Q59LN+ ,E1 Quad TransceiverPIN DESCRIPTION.8 4.1 PIN FUNCTION DESCRIPTIONS...12 5.
DS21S07A ,SCSI TerminatorGENERAL DESCRIPTION PIN CONFIGURATIONS Fast SCSI and Ultra SCSI require the use of active terminati ..
DS21S07AE ,SCSI TerminatorGENERAL DESCRIPTION PIN CONFIGURATIONS Fast SCSI and Ultra SCSI require the use of active terminati ..
DS21S07AS ,SCSI TerminatorFEATURES Fully Compliant with SCSI-1, Fast SCSI, and Ultra SCSI Backward Compatible to the DS2107 ..
DS21S07AS/TR , SCSI Terminator
DS21T05 ,SCSI TerminatorFUNCTIONAL DESCRIPTIONThe DS21T05 consists of a bandgap reference, buffer amplifier, and nine termi ..
DM74LS253N
3-STATE Data Selector/Multiplexer
DM74LS253 3-STATE Data Selector/Multiplexer August 1986 Revised March 2000 DM74LS253 3-STATE Data Selector/Multiplexer General Description Features Each of these Schottky-clamped data selectors/multiplex- � 3-STATE version of DM74LS153 with same pinout ers contains inverters and drivers to supply fully comple- � Schottky-diode-clamped transistors mentary, on-chip, binary decoding data selection to the � Permit multiplexing from N-lines to one line AND-OR gates. Separate output control inputs are pro- � Performs parallel-to-serial conversion vided for each of the two four-line sections. � Strobe/output control The 3-STATE outputs can interface directly with data lines � High fanout totem-pole outputs of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low � Typical propagation delay impedance of the single enabled output will drive the bus Data to output 12 ns line to a HIGH or LOW logic level. Select to output 21 ns � Typical power dissipation 35 mW Ordering Code: Order Number Package Number Package Description DM74LS253M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS253N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Select Data Inputs Output Output Inputs Control B A C0 C1 C2 C3 G Y XXX XX X H Z LL L X X X L L LL H X X X L H LH X L X X L L LH X H X X L H HL X X L X L L HL X X H X L H HH X X X L L L HH X X X H L H Address Inputs A and B are common to both sections. H = HIGH Level L = LOW Level X = Don't Care Z = High Impedance (OFF) © 2000 DS006416
