DM74LS154WM ,4-Line to 16-Line Decoder/DemultiplexerFeaturesEach of these 4-line-to-16-line decoders utilizes TTL cir- Decodes 4 binary-coded inputs i ..
DM74LS155M ,Dual 2-Line to 4-Line Decoders/DemultiplexersApplications:These TTL circuits feature dual 1-line-to-4-line demultiplex-Dual 2-to-4-line decodere ..
DM74LS155MX , Dual 2-Line to 4-Line Decoder/1-to-4 Line DemultiplexerApplications:ers with individual strobes and common binary-addressDual 2-to-4-line decoderinputs in ..
DM74LS155N ,Dual 2-Line to 4-Line Decoders/DemultiplexersApplications:
ers with individual strobes and common binary-address in- Dual 2-to-4-Iine decoder ..
DM74LS156M ,Dual 2-Line to 4-Line Decoders/DemultiplexersFeaturesThese TTL circuits feature dual 1-line-to-4-line demultiplex-
DM74LS156MX , Dual 2-Line to 4-Line Decoder/1-to-4 Line Demultiplexer with Open-Collector OutputsApplications:ers with individual strobes and common binary-addressDual 2-to-4-line decoderinputs in ..
DS21554LB+ ,3.3V/5V E1 Single Chip Transceivers (SCT) DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
DS21554LBN+ ,3.3V/5V E1 Single Chip Transceivers (SCT)Applications meet all the latest E1 specifications, including ITU-T Fully Independent Transmit an ..
DS21554LN ,3.3V/5V E1 Single-Chip TransceiversTABLE OF CONTENTS 1. INTRODUCTION...... 6 1.1.
DS21554LN ,3.3V/5V E1 Single-Chip TransceiversBLOCK DIAGRAM .. 9 3.
DS21554LN+ ,3.3V/5V E1 Single Chip Transceivers (SCT)FUNCTIONAL DESCRIPTION7 1.2. DOCUMENT REVISION HISTORY .8 2.
DS2155GNB+ ,T1/E1/J1 Single-Chip TransceiverFEATURES The DS2155 is a software-selectable T1, E1, or J1 Complete T1/DS1/ISDN-PRI/J1 Transceiver ..
DM74LS154WM
4-Line to 16-Line Decoder/Demultiplexer
DM74LS154 4-Line to 16-Line Decoder/Demultiplexer August 1986 Revised March 2000 DM74LS154 4-Line to 16-Line Decoder/Demultiplexer General Description Features Each of these 4-line-to-16-line decoders utilizes TTL cir- � Decodes 4 binary-coded inputs into one of 16 mutually cuitry to decode four binary-coded inputs into one of six- exclusive outputs teen mutually exclusive outputs when both the strobe � Performs the demultiplexing function by distributing data inputs, G1 and G2, are LOW. The demultiplexing function from one input line to any one of 16 outputs is performed by using the 4 input lines to address the out- � Input clamping diodes simplify system design put line, passing data from one of the strobe inputs with the � High fan-out, low-impedance, totem-pole outputs other strobe input LOW. When either strobe input is HIGH, all outputs are HIGH. These demultiplexers are ideally � Typical propagation delay suited for implementing high-performance memory decod- 3 levels of logic 23 ns ers. All inputs are buffered and input clamping diodes are Strobe 19 ns provided to minimize transmission-line effects and thereby � Typical power dissipation 45 mW simplify system design. Ordering Code: Order Number Package Number Package Description DM74LS154WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS154N N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Diagram © 2000 DS006394
