DM74LS122N ,7 V, retriggerable one-shot with clear and complementary outputFunctional Description
The basic output pulse width is determined by selection of
the internal ..
DM74LS123M ,Dual Retriggerable One-Shot with Clear and Complementary OutputsFunctional Description
The basic output pulse width is determined by selection of
an external r ..
DM74LS123MX , Dual Retriggerable One-Shot With Clear and Complementary OutputsFeaturesThe DM74LS123 is a dual retriggerable monostable multi-
DM74LS122N
7 V, retriggerable one-shot with clear and complementary output
National
T Semiconductor
DM74LS122 Retriggerable One-Shot with
Clear and Complementary Outputs
General Description
The DM74L8122 is a retriggerable monostable multivibrator
featuring both positive and negative edge triggering with
complementary outputs. An internal to kn timing resistor is
provided for design convenience minimizing component
count and layout problems, This device can be used with a
single external capacitor. The 'LS122 has two active-Iow
transition triggering inputs (A), two tttttive-high transition trig-
gering inputs (B), and a CLEAR input that terminates the
output pulse width at a predetermined time independent of
the timing components. The clear (CLR) input also serves
as a trigger input when it is pulsed with a low level pulse
transition (Tr), To obtain optimum and trouble free opera-
tion please mad operating rules and NSC one-shot applies
tion notes carefully and observe recommendations.
Features
I: DC triggered from active-high transition or active-low
transition inputs
n Retriggerable to 100% duty cycle
tt Over-riding clear terminates output pulse
a Internal 10 kn timing resistor
n TTL, DTL compatible
u Compensated tor Vcc and temperature variations
tt Input clamp diodes
Functional Description
The basic output pulse width is determined by selection of
the internal resistor Rm- or an external resistor (Rx) and
capacitor (Ox). Once triggered, the output pulse width may
be extended by retriggering the gated active-Iow (A) tran-
sition inputs or the active-high transition (B) inputs or the
CLEAR input. The output pulse width can be reduced or
terminated by overriding it with the active-low CLEAR input.
Connection Diagram
DuaI-In-Llne Package
Vcc can we CEXT NC Rm Q
l" " ly l" Iso Is a
, " a 4 5 6 Ir
A1 A2 B1 B2 cm i5 sun
TL/FISSBE-t
Order Number DM74LS122M or DM74L5122N
See NS Package Number M14A or N14A
Function Table
Inputs Outputs
CLEAR At A2 B1 B2 o 6
L x x x x L H
x H H x x L H
x x x L x L H
x x x x L L H
H L x t H J1 Tr
H L x H t J1 Ir
H x L t H IL if
H x L H t IL If
H H t H H J1. If
H l t H H II Ir
H t H H H I1 'II
t L x H H 11. 1:
t x L H H J1 'Lr
H = High Logic Level
L = Low Logic Level
x - Can Be Either Low or High
t = Positive Going Transition
l = Negative Going Transition
II. "' A Positive Pulse
Ir = A Negative Pulse
ZZl-S'I
Absolute Maximum Ratings (Note)
It Mllitary/Aerospace speclfled devlces are required,
please contact the National Semiconductor Sales
Offltte/DlstrlButors for avaliablllty and speemeatlons.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM74LS 0°C to + 70"C
Storage Temperature -65'C to + 150°C
Recommended Operating Conditions
Note: The "Absolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric va/ues dafined in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define
the conditions for actual device operation.
Symbol Parameters Min Nom Max Units
Vcc Supply Voltage 4.75 5 5.25 V
VIH High Level Input Voltage 2 V
" Low Level Input Voltage 0.8 V
IOH High Level Output Current - 0.4 mA
IOL Low Level Output Current 8 mA
tw Pulse Width A or B High 40
(Note 6) A or B Low 40 ns
Clear Low 40
REXT External Timing Resistor 5 260 kn
CEXT External Timing Capacitance No Restriction p.F
CWIRE Wiring Capacitance ' 50 pF
at REXT/CEXT Terminal
TA Free Air Operating Temperature 0 70 "C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Unlts
(Note 1)
V. lnputClamp Voltage VCC = Min,l = --18 mA -1.5 V
VOH High Level Output Vcc = Min, IOH = Max 2 7 3 4 V
Voltage VIL = Max,V.H == Min . .
VOL Low Level Output Vcc = Min, IOL = Max 0 35 0 5
Voltage Vn. = Max,1hH = Min . . V
IOL = 4 mA, Vcc = Min 0.25 0.4
k InputCurrent @ Max VCC = Max, VI = 7V 0.1 mA
Input Voltage
'IH High Levei Input Current Vcc = Max, V. = 2.7V 20 [J.A
hL Low Level InputCurrent Vcc = Max, Ih = 0.4V -0.4 mA
los Short Circuit Vcc = Max _ -
Output Current (Note 2) 20 100 mA
ICC Supply Current VCC = Max (Notes 3, 4 and 5) 6 11 mA
Switching Characteristics at Vcc = 5V and TA = 25°C (See Section 1 for Test Waveforms and Output Load)
ZZl-S'I
Ru = 2 kn
From (Input) C - _
t.=--1tipF CL=--15PF
Symbol Parameter To (Output) cEXT = 0 pF, REXT = 5 kn CE" = tooOpF. REXT = 10 k n Unlts
Min Max Min Max
tpLH Propagation Delay Time A to Q 33 as
Low to High Level Output
tpLH Propagation Delay Time B to ta 44 ns
Low to High Level Output
tpHL Propagation Delay Time A to 5 45 as
High to Low Level Output
tpHL Propagation Delay Time B to t5 56 ns
High to Low Level Output
tpLH Propagation Delay Time Clear to 6 45 ns
Low to High Level Output
tpHL Propagation Delay Time Clear to Q 27 ns
High to Low Level Output
tWQ(Min) Minimum Width of Pulse A or B to 0
at Output 0 200 ns
M(out) Output Pulse Width A or B to Q 4 5 ps
Note 1: All typical: ave at Vcc = 5V, TA = 2513.
Note 2: Not more than one output should be shorted at a time. and the duration should not exceed one second.
Note 3: Quiescent Ice is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded. all outputs open, ngr = 0.02 pF. and REXT =
25 kn.
Note q.. kx; is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs open. CEXT = 0.02 FF, and Rm = 25 kn.
Note lit With all outputs open and 4.5V applied to all data and clear inputs, Ice is measured after a momentary ground, then 4.5V is applied to the clock
Note ti:TA = 25‘C and Vcc; = 5V.
Operating Rules m, c
I. To use the internal 10 kft timing resistor. connect the ym.5,w
HINT pin to V00. ttf
2. An external resistor (Rx) or the internal resistor (10 kn)
and an external capacitor (Ox) are required tor proper
operation. The value of Cx may vary from 0 to any neces-
sary value. For small time constants use high-quality
mica, glass, polypropylene, polycarbonate, or polystyrene
capacitors. For large time constants use solid tantalum or
special aluminum capacitors. If the timing capacitors
have leakages approaching 100 nA or if stray capaci- m
tance from either terminal to ground is greater than 50 pF 10 100 1000
the timing equations may not represent the pulse width text on
the device generates. TL/F/6385-2
3. The pulse width is essentially determined by external tim- FIGURE 1
ing components Rx and Cx. For Cx < 1000 pF see Fig-
ure 1; design curves on Tw as function of timing compo-
nents value. For Cx > > 1000 pF the output is defined as:
Tw = KHXCX
ll 1M)
where [Rx is in kn]
ith: is in pF]
[Tw is in nsl
K AT. 0.37
Operating Rules (Continued)
The K factor is not a constant, but, varies with Cx. See
Figure 2.
100 “F
Te25'0
Vac: 5.W
0.1 yF
" ttf "
tttt "
.4 I I [01.2 111.5
"K" COEFFICIENT
TL/F/6385-3
FIGURE 2
4. The switching diode required for most TTL one-shots
when using an electrolytic timing capacitor is not needed
for the 'L8122 and should not be used.
5. To obtain variable pulse width by remote trimming, the
following circuit is recommended:
"uvv--t
h Rmnm
PIN (13)
pm (11) 7
TL/F/6385-4
Note: "Rramole" should be as close to the device pins as possible.
FIGURE 3
6. The retriggerable pulse width is calculated as shown be.
T = Tw + tPLH = 0.50 M RX M Cx + TPLH
The retriggered pulse width is equal to the pulse width
plus a delay time period (Figure 4).
INNT F"""] Cn
outru1__l
TL/F/6385-5
FIGURE 4
7. Output pulse width variation versus Vcc and operation
temperatures: Figure 5 depicts the relationship between
pulse width variation versus Vcc; and Figure 6 depicts
pulse width variation versus temperatures.
nme'iox
Ctatm1000 "
5 - TA-25°C
M7. CHANGE
4 4.5 5 5.5 a
Vet: N)
TL/Ft82tu5-8
FIGURE 5
Elms ttht
Cm "tooo PF
5 - Vcc-SBV
bu '/. CHANGE
-iio-30 0 30 60 90120|50
AMBIENT TEMPERM’UHE (''C)
TL/F/6385-r
FIGURE 6
8. Under any operating Condition Cx and Fix must be kept
as close to the one-shot device pins as possible to mini-
mize stray capacitance, to reduce noise pick-up, and to
reduce i-Fi and Ldi/dt voltage developed along their con-
necting paths. If the lead length from Cx to pins (13) and
(11) is greater than 8 cm, for example, the output pulse
width might be quite different from values predicted from
the appropriate equations. A non-inductive and low ca-
pacitive path is necessary to ensure complete discharge
of Cx in each cycle of its operation so that the output
pulse width will be accurate.
9. Vcc and ground wiring should conform to good high-fre-
quency standards and practices so that switching tran-
sients on the V00 and ground return leads do not cause
interaction between one-shots. A 0.01 piF to 0.10 pF by-
pass capacitor (disk ceramic or monolithic type) from Vcc
to ground is necessary on each device. Furthermore, the
bypass capacitor should be located as close to the VCC
pin as space permits.
‘Fer further detailed device characteristics and output performance
please refer to the NSC one-ahot application note AN-ass.
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM74LS122N - product/dm74ls122n?HQS=TI-nu|I-nu|l-dscataIog-df-pf-null-wwe
DM74LS122M - product/dm74ls122m?HQS=T|-nu|I-nu|I-dscataIog-df-pf-null-wwe
