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DM74ALS576ANNSN/a234avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576ANFAIRCHILN/a30avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576AWMFAIN/a756avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576AWMFSCN/a19avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576AWMFAIRCHILD N/a120avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576AWMXFSCN/a3000avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576AWMXFAIRCHILDN/a569avaiOctal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs


DM74ALS576AWMX ,Octal D-Type Edge-Triggered Flip-Flops with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs

DM74ALS576AN-DM74ALS576AWM-DM74ALS576AWMX
Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74ALS576A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs October 1986 Revised July 2004 DM74ALS576A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs General Description Features These 8-bit registers feature totem-pole 3-STATE outputsSwitching specifications at 50 pF designed specifically for driving highly-capacitive or rela-Switching specifications guaranteed over full tempera- tively low-impedance loads. The high-impedance state and ture and V range CC increased high-logic-level drive provide these registers with Advanced oxide-isolated, ion-implanted Schottky TTL the capability of being connected directly to and driving the process bus lines in a bus-organized system without need for inter- 3-STATE buffer-type outputs drive bus lines directly face or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the DM74ALS576A are edge-trig- gered inverting D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the complement of the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-imped- ance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Ordering Code: Order Number Package Number Package Description DM74ALS576AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide (Note 1) DM74ALS576SJX M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS576AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Note 1: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2004 DS006228
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