DM74ALS574ASJX ,Octal D-Type Edge Triggered Flip-Flop with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS574AWM ,Octal D-Type Edge Triggered Flip-Flop with 3-STATE OutputsDM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsSeptember 1986Revised Februar ..
DM74ALS574AWM ,Octal D-Type Edge Triggered Flip-Flop with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS576AN ,Octal D-Type Edge-Triggered Flip-Flops with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs
DM74ALS574AN-DM74ALS574ASJX-DM74ALS574AWM
Octal D-Type Edge Triggered Flip-Flop with 3-STATE Outputs
DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs September 1986 Revised February 2000 DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs General Description Features These 8-bit registers feature totem-pole 3-STATE outputs � Switching specifications at 50 pF designed specifically for driving highly-capacitive or rela- � Switching specifications guaranteed over full tempera- tively low-impedance loads. The high-impedance state and ture and V range CC increased high-logic-level drive provide these registers with � Advanced oxide-isolated, ion-implanted Schottky TTL the capability of being connected directly to and driving the process bus lines in a bus-organized system without need for inter- � Functionally equivalent with DM74LS374 face or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional � Improved AC performance over DM74LS374 at approxi- bus drivers, and working registers. mately half the power The eight flip-flops of the DM74ALS574A are edge-trig- � 3-STATE buffer-type outputs drive bus lines directly gered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-imped- ance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Ordering Code: Order Number Package Number Package Description DM74ALS574AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74ALS574ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS574AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 DS006110
