DM74ALS533WMX ,Octal D-Type Transparent Latches with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS534N ,Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS534WM ,Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsDM74ALS534 Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsApril 1984Revised February 200 ..
DM74ALS541N ,Octal Buffers and Line Drivers with 3-STATE OutputsFeaturesThis octal buffer and line driver is designed to have the per- ■ Advanced oxide-isolated io ..
DM74ALS541N ,Octal Buffers and Line Drivers with 3-STATE OutputsDM74ALS541 Octal Buffer and Line Driver with 3-STATE OutputsOctober 1986Revised February 2000DM74AL ..
DM74ALS541SJ ,Octal Buffers and Line Drivers with 3-STATE OutputsFeaturesThis octal buffer and line driver is designed to have the per- ■ Advanced oxide-isolated io ..
DS1848E-010 ,Dual Temperature-Controlled NV Variable Resistor & MemoryFEATURES Two linear taper, temperature-controlledvariable resistors SDA 1 14 Vcc DS184 ..
DS1848E-010 ,Dual Temperature-Controlled NV Variable Resistor & MemoryDS1848Dual Temperature-ControlledNV Variable Resistor & MemoryPIN ASSIGNMENT
DS1848E-010+ ,Dual Temperature-Controlled NV Variable Resistor & MemoryFEATURES Two linear taper, temperature-controlled variable resistors SDA 1 14 Vcc ..
DS1848E-010+T&R ,Dual Temperature-Controlled NV Variable Resistor & MemoryPIN DESCRIPTIONS Name TSSOP BGA Description V 14 A3 Power Supply Terminal. The DS1848 ..
DS1848E-050 ,Dual Temperature-Controlled NV Variable Resistor & MemoryPIN DESCRIPTIONSName TSSOP BGA DescriptionV 14 A3 Power Supply Terminal. The DS1848 wi ..
DS1848E-050 ,Dual Temperature-Controlled NV Variable Resistor & MemoryPIN DESCRIPTIONSName TSSOP BGA DescriptionV 14 A3 Power Supply Terminal. The DS1848 wi ..
DM74ALS533WM-DM74ALS533WMX
Octal D-Type Transparent Latches with 3-STATE Outputs
DM74ALS533 Octal D-Type Transparent Latch with 3-STATE Outputs April 1984 Revised February 2000 DM74ALS533 Octal D-Type Transparent Latch with 3-STATE Outputs General Description Features These 8-bit registers feature totem-pole 3-STATE outputs � Switching specifications at 50 pF designed specifically for driving highly-capacitive or rela- � Switching specifications guaranteed over full tempera- tively low-impedance loads. The high-impedance state and ture and V range CC increased high-logic-level drive provide these registers with � Advanced oxide-isolated, ion-implanted Schottky TTL the capability of being connected directly to and driving the process bus lines in a bus-organized system without need for inter- � 3-STATE buffer-type outputs drive bus lines directly face or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight inverting latches of the DM74ALS533 are trans- parent D-type latches. While the enable (G) is HIGH the Q outputs will follow the complement of the data (D) inputs. When the enable is taken LOW the output will be latched at the complement of the level of the data that was set up. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-imped- ance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Ordering Code: Order Number Package Number Package Description DM74ALS533WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74ALS533N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 DS006222
