DM74ALS5245WMX ,Octal 3-STATE TransceiverFeaturesThis octal bus transceiver is designed for asynchronous ■ Input Hysteresistwo-way communica ..
DM74ALS533WM ,Octal D-Type Transparent Latches with 3-STATE OutputsDM74ALS533 Octal D-Type Transparent Latch with 3-STATE OutputsApril 1984Revised February 2000DM74AL ..
DM74ALS533WMX ,Octal D-Type Transparent Latches with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS534N ,Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS534WM ,Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsDM74ALS534 Octal D-Type Edge-Triggered Flip-Flop with 3-STATE OutputsApril 1984Revised February 200 ..
DM74ALS541N ,Octal Buffers and Line Drivers with 3-STATE OutputsFeaturesThis octal buffer and line driver is designed to have the per- ■ Advanced oxide-isolated io ..
DS1848B-050+T&R ,Dual Temperature-Controlled NV Variable Resistor & MemoryPIN DESCRIPTIONS Name TSSOP BGA Description V 14 A3 Power Supply Terminal. The DS1848 ..
DS1848E-010 ,Dual Temperature-Controlled NV Variable Resistor & MemoryFEATURES Two linear taper, temperature-controlledvariable resistors SDA 1 14 Vcc DS184 ..
DS1848E-010 ,Dual Temperature-Controlled NV Variable Resistor & MemoryDS1848Dual Temperature-ControlledNV Variable Resistor & MemoryPIN ASSIGNMENT
DS1848E-010+ ,Dual Temperature-Controlled NV Variable Resistor & MemoryFEATURES Two linear taper, temperature-controlled variable resistors SDA 1 14 Vcc ..
DS1848E-010+T&R ,Dual Temperature-Controlled NV Variable Resistor & MemoryPIN DESCRIPTIONS Name TSSOP BGA Description V 14 A3 Power Supply Terminal. The DS1848 ..
DS1848E-050 ,Dual Temperature-Controlled NV Variable Resistor & MemoryPIN DESCRIPTIONSName TSSOP BGA DescriptionV 14 A3 Power Supply Terminal. The DS1848 wi ..
DM74ALS5245WM-DM74ALS5245WMX
Octal 3-STATE Transceiver
DM74ALS5245 Octal 3-STATE Transceiver October 1986 Revised February 2000 DM74ALS5245 Octal 3-STATE Transceiver General Description Features This octal bus transceiver is designed for asynchronous � Input Hysteresis two-way communication between data buses. The inputs � Low output noise generation include hysteresis which provides improved noise rejec- � High input noise immunity tion. Data is transmitted either from the A bus to the B bus � Advanced oxide-isolated, ion implanted Schottky TTL or from the B bus to the A bus depending on the logic level process of the direction control (DIR) input. The device can be dis- � Switching specification guaranteed over the full temper- abled via the enable input (G) which causes the outputs to enter the high impedance mode so the buses are effec- ature and V range CC tively isolated. � PNP inputs to reduce input loading Ordering Code: Order Number Package Number Package Description DM74ALS5245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74ALS5245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS5245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Control Inputs Operation G DIR L L B Data to A Bus L H A Data to B Bus H X High Impedance L = LOW Logic Level H = HIGH Logic Level X = Don't Care (Either LOW or HIGH Logic Level) © 2000 DS009175
