DM74ALS38AN ,Quadruple 2-Input NAND Buffers with Open-Collector OutputsFeaturesThis device contains four independent gates, each of which ■ Switching specifications at 50 ..
DM74ALS38AN ,Quadruple 2-Input NAND Buffers with Open-Collector OutputsDM74ALS38A Quadruple 2-Input NAND Buffer with Open-Collector OutputsSeptember 1986Revised February ..
DM74ALS520N ,8-Bit ComparatorDM74ALS520 • DM74ALS521 8-Bit ComparatorSeptember 1986Revised April 2000DM74ALS520 DM74ALS5218-Bi ..
DM74ALS520WM ,8-Bit ComparatorDM74ALS520 • DM74ALS521 8-Bit ComparatorSeptember 1986Revised April 2000DM74ALS520 DM74ALS5218-Bi ..
DM74ALS520WM ,8-Bit ComparatorFeaturesThese comparators perform an “equal to” comparison of
DM74ALS38AM-DM74ALS38AN
Quadruple 2-Input NAND Buffers with Open-Collector Outputs
DM74ALS38A Quadruple 2-Input NAND Buffer with Open-Collector Outputs September 1986 Revised February 2000 DM74ALS38A Quadruple 2-Input NAND Buffer with Open-Collector Outputs General Description Features This device contains four independent gates, each of which � Switching specifications at 50 pF performs the logic NAND function. The open-collector out- � Switching specifications guaranteed over full tempera- puts require external pull-up resistors for proper logical ture and V range CC operation. � Advanced oxide-isolated, ion-implanted Schottky TTL Pull-Up Resistor Equations process � Functionally and pin for pin compatible with LS TTL counterpart � Improved AC performance over LS38 � Improved line receiving characteristics Where: N (I ) = total maximum output HIGH current 1 OH for all outputs tied to pull-up resistor N (I ) = total maximum input HIGH current 2 IH for all inputs tied to pull-up resistor N (I ) = total maximum input LOW current for 3 IL all inputs tied to pull-up resistor Ordering Code: Order Number Package Number Package Description DM74ALS38AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74ALS38AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = AB Inputs Output AB Y LL H LH H HL H HH L H = HIGH Logic Level L = LOW Logic Level © 2000 DS006193
