DM74ALS373SJX ,Octal D-Type 3-STATE Transparent LatchesDM74ALS373 Octal D-Type 3-STATE Transparent LatchApril 1984Revised February 2000DM74ALS373Octal D-T ..
DM74ALS373SJX ,Octal D-Type 3-STATE Transparent LatchesDM74ALS373 Octal D-Type 3-STATE Transparent LatchApril 1984Revised February 2000DM74ALS373Octal D-T ..
DM74ALS373WM ,Octal D-Type 3-STATE Transparent LatchesFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS373WMX ,Octal D-Type 3-STATE Transparent LatchesFeaturesThese 8-bit registers feature totem-pole 3-STATE outputs ■ Switching specifications at 50 p ..
DM74ALS374N ,Octal 3-STATE D-Type-Edge-Triggered Flip-Flopsfeatures totem-pole 3-STATE outputs ■ Switching specifications at 50 pFdesigned specifically for dr ..
DM74ALS374SJX ,Octal 3-STATE D-Type-Edge-Triggered Flip-Flopsfeatures totem-pole 3-STATE outputs ■ Switching specifications at 50 pFdesigned specifically for dr ..
DS1844/100 ,Quad Digital Potentiometerblock diagram ofthe DS1844 is shown in Figure 1.SERIAL PORT OPERATIONAs stated, the DS1844 can supp ..
DS1844-010 ,Quad Digital PotentiometerPIN DESCRIPTIONV - 2.7V to 5.5VCCPS - Port SelectA0, A1, A2 - Device Select Pins (2-Wire)SDA - Seri ..
DS1844-050 ,Quad Digital PotentiometerFEATURES PIN ASSIGNMENT§ Four independent, digitally controlled 64- PS 1 20 VCCposition ..
DS1844-100 ,Quad Digital Potentiometer DS1844Quad Digital Potentiometerwww.dalsemi.com
DS1844-100 ,Quad Digital Potentiometerpin description table lists pin functionality according to the interface selected.5-Wire Serial Por ..
DS1844E-010 ,Quad Digital PotentiometerElectrical Characteristics table for 5-wire serial communications. Data is loaded MSB first and in ..
DM74ALS373N-DM74ALS373SJ-DM74ALS373SJX-DM74ALS373WM-DM74ALS373WMX
Octal D-Type 3-STATE Transparent Latches
DM74ALS373 Octal D-Type 3-STATE Transparent Latch April 1984 Revised February 2000 DM74ALS373 Octal D-Type 3-STATE Transparent Latch General Description Features These 8-bit registers feature totem-pole 3-STATE outputs � Switching specifications at 50 pF designed specifically for driving highly-capacitive or rela- � Switching specifications guaranteed over full tempera- tively low-impedance loads. The high-impedance state and ture and V range CC increased high-logic-level drive provide these registers with � Advanced oxide-isolated, ion-implanted Schottky TTL the capability of being connected directly to and driving the process bus lines in a bus-organized system without need for inter- � Functionally and pin for pin compatible with LS TTL face or pull-up components. They are particularly attractive counterpart for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. � Improved AC performance over DM74LS373 at approxi- mately half the power The eight latches of the DM74ALS373 are transparent D- type latches. While the enable (G) is HIGH the Q outputs � 3-STATE buffer-type outputs drive bus lines directly will follow the data (D) inputs. When the enable is taken LOW the output will be latched at the level of the data that was set up. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-imped- ance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Ordering Code: Order Number Package Number Package Description DM74ALS373WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74ALS373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS373N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 DS006220
