DM74ALS174MX ,Hex/Quad D Flip-Flops with a Synchronous Clear InputDM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with ClearSeptember 1986Revised February 2000DM7 ..
DM74ALS174MX ,Hex/Quad D Flip-Flops with a Synchronous Clear InputDM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with ClearSeptember 1986Revised February 2000DM7 ..
DM74ALS174N ,Hex/Quad D Flip-Flops with a Synchronous Clear InputDM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with ClearSeptember 1986Revised February 2000DM7 ..
DM74ALS174SJ ,Hex/Quad D Flip-Flops with a Synchronous Clear InputDM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with ClearSeptember 1986Revised February 2000DM7 ..
DM74ALS175M ,Hex/Quad D Flip-Flops with Clear and Complementary OutputsDM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with ClearSeptember 1986Revised February 2000DM7 ..
DM74ALS175M ,Hex/Quad D Flip-Flops with Clear and Complementary OutputsDM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with ClearSeptember 1986Revised February 2000DM7 ..
DS1816R-10/T&R ,3.3V EconoReset with Open Drain OutputDS18163.3V EconoReset withOpen Drain Output
DS1816R-10-U+ ,3.3V EconoReset with Open Drain OutputFEATURES PIN ASSIGNMENT Automatically restarts a microprocessor after3power failureDALLASDS1816 M ..
DS1816R-20/T&R ,3.3V EconoReset with Open Drain OutputPIN DESCRIPTIONTO-921 RST Active Low Reset Output2 V Power SupplyCC3 GND GroundSOT-231 RST Active L ..
DS1817 ,Active High 3.3V EconoResetPIN DESCRIPTIONTO-921 RST Active High Reset Output2 V Power SupplyCC3 GND GroundSOT-231 RST Active ..
DS1817 ,Active High 3.3V EconoResetFEATURES PIN ASSIGNMENT Automatically restarts a microprocessor after3power failureDALLASDS1817 M ..
DS1817 ,Active High 3.3V EconoResetDS1817Active High 3.3V EconoReset
DM74ALS174M-DM74ALS174MX-DM74ALS174N-DM74ALS174SJ-DM74ALS175M-DM74ALS175MX-DM74ALS175N-DM74ALS175SJ
Hex/Quad D Flip-Flops with a Synchronous Clear Input
DM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear September 1986 Revised February 2000 DM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry � Advanced oxide-isolated ion-implanted Schottky TTL to implement D-type flip-flop logic. Both have an asynchro- process nous clear input, and the quad (DM74ALS175) version fea- � Pin and functional compatible with LS family counterpart tures complementary outputs from each flip-flop. � Typical clock frequency maximum is 80 MHz Information at the D inputs meeting the setup time require- � Switching performance guaranteed over full temperature ments is transferred to the Q outputs on the positive-going and V supply range CC edge of the clock pulse. Clock triggering occurs at a partic- ular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output. Ordering Code: Ordering Code Package Number Package Description DM74ALS174M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74ALS174SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS174N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74ALS175M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74ALS175SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS175N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams DM74ALS174 DM74ALS175 © 2000 DS006112
