DM74ALS09MX ,Quad 2-Input AND Gates with Open Collector OutputsDM74ALS09 Quad 2-Input AND Gate with Open Collector OutputsSeptember 1986Revised February 2000DM74A ..
DM74ALS09N ,Quad 2-Input AND Gates with Open Collector OutputsDM74ALS09 Quad 2-Input AND Gate with Open Collector OutputsSeptember 1986Revised February 2000DM74A ..
DM74ALS1000AN ,Quadruple 2-Input NAND BufferDM74ALS1000A Quadruple 2-Input NAND BufferSeptember 1986Revised February 2000DM74ALS1000AQuadruple ..
DM74ALS1000AN ,Quadruple 2-Input NAND BufferFeaturesThese devices contain four independent 2-input buffer/driv- ■ Switching specifications at 5 ..
DM74ALS1004M ,Hex Inverting DriverFeaturesThese devices contain six independent drivers, each of ■ Switching specifications at 50 pFw ..
DM74ALS1004N ,Hex Inverting DriverDM74ALS1004 Hex Inverting DriverSeptember 1986Revised February 2000DM74ALS1004 Hex Inverting Driver
DS1809U-010 ,Dallastat, 64-position linear taperBLOCK DIAGRAM Figure 1OPERATIONThe DS1809 Dallastat is a digitally controlled, nonvolatile potentio ..
DS1809U-050 ,Dallastat, 64-position linear taperFEATURESPIN ASSIGNMENT§ 64-position linear taper§ Two nonvolatile wiper storage options R ..
DS1809U-100 ,Dallastat, 64-position linear taperapplications or CPU-generated control signals, external debounce circuitry is notneeded. The contro ..
DS1809Z-010 ,Dallastat, 64-position linear taperDS1809Dallastatwww.dalsemi.com
DS1810 ,5V EconoReset with Push-Pull OutputPIN DESCRIPTIONTO-921 RST Active Low Reset Output2 V Power SupplyCC3 GND GroundSOT-231 RST Active L ..
DS1810 ,5V EconoReset with Push-Pull OutputFEATURES PIN ASSIGNMENT Automatically restarts a microprocessor after3power failureDALLASDS1810 M ..
DM74ALS09M-DM74ALS09MX-DM74ALS09N
Quad 2-Input AND Gates with Open Collector Outputs
DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs September 1986 Revised February 2000 DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description Features This device contains four independent gates, each of which � Switching specifications at 50 pF performs the logic AND function. The open-collector out- � Switching specifications guaranteed over full tempera- puts require external pull-up resistors for proper logical ture and V range CC operation. � Advanced oxide-isolated, ion-implanted Schottky TTL Pull-Up Resistor Equations process � Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart � Improved AC performance over Schottky and low power Schottky counterparts Where: N (I ) = total maximum output HIGH current 1 OH for all outputs tied to pull-up resistor N (I ) = total maximum input HIGH current 2 IH for all inputs tied to pull-up resistor N (I ) = total maximum input LOW current for 3 IL all inputs tied to pull-up resistor Ordering Code: Order Number Package Number Package Description DM74ALS09M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74ALS09N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = AB Inputs Output AB Y LL L LH L HL L HH H H = HIGH Logic Level L = LOW Logic Level © 2000 DS006179
