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DM7476N
7 V, dual master-slave J-K flip-flop with clear, preset and complementary output
National _
Semiconductor
5476/ DM5476/ DM7476
Dual Master-Slave J-K Flip-Flops with Clear,
Preset, and Complementary Outputs
General Description
This device contains two independent positive pulse trig-
gered J-K flip-flops with complementary outputs. The J and
K data is processed by the flip-flop after a complete clock
pulse. While the clock is low the slave is isolated from the
master. On the positive transition of the clock, the data from
the J and K inputs is transferred to the master. While the
clock is high the J and K inputs are disabled. On the nega-
tive transition of the clock, the data from the master is trans-
ferred to the slave. The logic state of J and K inputs must
not be allowed to change while the clock is high. The data is
transfered to the outputs on the falling edge of the clock
pulse. A low logic level on the preset or clear inputs will set
or reset the outputs regardless of the logic levels of the
other inputs.
Features
I: Alternate Military/Aerospace device (5476) is available.
Contact a National Semiconductor Sales OffiCe/Distrib-
utor for specifications.
Connection Diagram
DuaI-In-Llne Package
ttt tlt tit sun K2 (12 lit "
is is " I13 12 tt l,, ll
, 2 3 I 5 I 1 I
thI PR1 CLttt JI Pee tlutt PR1 CM"
TL/F/6528-1
Order Number 547GDMOB. 5476FMQB,
DM5476J, DM5476W or DM7476N
See NS Package Number J16A. N16E or W16A
Function Table
Inputs Outputs
PR CLR CLK J K 0 6
L H X X X H L
H L X X X L H
L L X X X H* H*
H H Jn.. L L th 60
H H J'L H L H L
H H JI.. L H L H
H H J1. H H Toggle
H '* High Logic Level
L - Low Logic Level
X = Either Low or High Logic Level
J-L -- Positive pulse data. The J and K inputs must be held constant whlle
the clock ls high. Data is transiered to the outputs on the falling edge of the
clock pulse.
. = This configuration is nanstable; that is, it will not persist when the preset
and/or clear inputs return to their inactive (high) level.
th = The output logic level before the indicated input conditions were es-
tigblished.
Toggle = Each output changes to the complement of its previous level on
each complete active high level clock pulse.
Absolute Maximum Ratings (Note)
" Mllllary/Aerospace speclfled devices are required,
please contact the National Semiconductor Sales
offlCefDhttlttutors for availability and spettmcations.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range
DM54 and 54 - 55''C to + 125°C
Storage Temperature Range
tPC to + 70''C
--65t to + 15ty'C
Recommended Operating Conditions
Note: The "Absolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
paramemb values dMined in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions " table will define
the tpond/tions far actual device operation.
Symbol Parameter DM5476 DM7476 Unlta
Min Nom Max Min Nom Max
VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High Level Input Voltage 2 2 V
" Low Level Input Voltage 0.8 0.8 V
'OH High Level Output Current - 0.4 -0.4 mA
lot. Low Level Output Current 16 16 mA
chK Clock Frequency (Note 6) 0 15 0 15 MHz
tw Pulse Width Clock High 20 20
(Note 6) Clock Low 47 47 ns
Preset Low 25 25
Clear Low 25 25
tsu Input Setup Time (Notes 1 & 6) 0 t 0 t ns
tH Input Hold Time (Notes 1 & 6) 0 l 0 l ns
TA Free Air Operating Temperature - 55 125 0 70 'C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Condltlons Mln (N322) Max Units
V, InputClamp Voltage Vcc = Min, l. = - 12 mA -1.5 V
VOH High LevelOutput Vcc = Min, IOH = Max 2 4 3.4 V
Voltage " = Max,VIH = Min .
VOL Low Level Output Vcc = Min. IOL = Max 0 2 0.4 V
Voltage " = Min, " = Max .
ll Input Current © Max Vcc = Max, V. = 5.5V 1 m A
Input Voitage
IIH High Level Input Vcc = Max J, K 40
Current VI = 2.4V Clock 80 A
Clear 80 IL
Preset 80
le. Low Level Input Vcc = Max J, K - 1.6
Current V, = 0.4V Clock -3.2 mA
(Note 5) Clear -3.2
Preset -3.2
log Short Circuit Vcc == Max DM54 -20 -55 m A
Output Current (Note 3) DM74 _ 18 _ 55
'00 Supply Current VCC = Max (Note 4) 18 34 mA
Note 1: The symbol ( T. l) indicates the edge of the clue“ pulse is used for reference (T) for rising edge. (i) tor falling edge.
Note 2t All typicals are at Vcc " 5V, TA = 25''C.
Not. 3: Not more than one output should be shoned at a time.
Nttttt 4: With all outputs open, '00 is measured with the Q and G outputs high in turn. At the time of measurement the clock input is grounded.
Not. s.. Clear is measured with preset high and preset is measured with clear high.
Note a: TA --, 2510 and vcc = 5V.
Switching Characteristics at Vcc = 5V and TA = 25'C (See Section 1 for Test Waveforms and Output Load)
s mbol Parameter From (Input) (IL CC' If,',') Units
y To (Output) L p
Mln Max
fMAX Maximum Clock 15 MHz
Frequency
tPHL Propagation Delay Time Preset 40 ns
High to Low Level Output to 15
tpLH Propagation Delay Time Preset 25 ns
Low to High Level Output to Q
tPHL Propagation Delay Time Clear 40 n 3
High to Low Level Output to Q
tpLH Propagation Delay Time Clear 25 ns
Low to High Level Output to G
tPHL Propagation Delay Time Clock to 40 ns
High to Low Level Output Q or Co
now Propagation Delay Time Clock to 25 ns
Low to High Level Output Q or G
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This file is the datasheet for the following electronic components:
DM7476N - product/dm7476n?HQS=T|-nu|I-nulI-dscatalog-df-pf—nuII-wwe
