DM7426N ,Quad 2-Input NAND Gates with High Voltage Open-Collector OutputsGeneral Description Pull-Up Resistor EquationsThis device contains four independent gates each of w ..
DM7427N ,DM7427 Triple 3-Input NOR GatesDM7427Triple3-InputNORGatesJune1989DM7427Triple3-InputNORGatesGeneralDescriptionThisdevicecontainst ..
DM7427N ,DM7427 Triple 3-Input NOR GatesDM7427Triple3-InputNORGatesJune1989DM7427Triple3-InputNORGatesGeneralDescriptionThisdevicecontainst ..
DM74283N ,4-Bit Binary Full Adder (with Fast Carry)54283/DM742834-BitBinaryFullAdder(withFastCarry)June198954283/DM742834-BitBinaryFullAdder(withFastC ..
DM7430N ,7 V, 8-input NAND gateGeneral Description
This device contains a single gate which performs the logic
NAND function ..
DM7430N ,7 V, 8-input NAND gateGeneral Description
This device contains a single gate which performs the logic
NAND function ..
DS1746P-70 ,Y2K-Compliant, Nonvolatile Timekeeping RAMsPIN DESCRIPTIONA0–A16 – Address InputCE – Chip EnableOE – Output EnableWE – Write EnableV – Po ..
DS1746P-70+ ,Y2K-Compliant, Nonvolatile Timekeeping RAMsFEATURES PIN CONFIGURATIONS Integrated NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail C ..
DS1746W/120 ,Y2K-Compliant, Nonvolatile Timekeeping RAMsFEATURES PIN ASSIGNMENT Integrated NV SRAM, real time clock,NC1 32 VCCcrystal, power-fail control ..
DS1746W/120+ ,Y2K-Compliant, Nonvolatile Timekeeping RAMs DS1746/DS1746P Y2K-Compliant, N onvolatile Timekeeping RAMs
DS1746W+120 ,Y2K-Compliant, Nonvolatile Timekeeping RAMs DS1746/DS1746P Y2KC Nonvolatile Timekeeping RAMwww.dalsemi.com
DS1746W-120 ,Y2K-Compliant, Nonvolatile Timekeeping RAMsPIN DESCRIPTIONA0–A16 – Address InputCE – Chip EnableOE – Output EnableWE – Write EnableV – Po ..
DM7426N
Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs
DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs August 1986 Revised February 2000 DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out- puts require external pull-up resistors for proper logical operation. Where: N (I ) = total maximum output high current 1 OH for all outputs tied to pull-up resistor N (I ) = total maximum input high current for 2 IH all inputs tied to pull-up resistor N (I ) = total maximum input low current for 3 IL all inputs tied to pull-up resistor Ordering Code: Order Number Package Number Package Description DM7426N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Function Table Y = AB Inputs Output AB Y LL H LH H HL H HH L H = HIGH Logic Level L = LOW Logic Level © 2000 DS006508
